Lines Matching refs:Decoder

63                                            const void *Decoder) {  in DecodeGPRRegisterClass()  argument
65 static_cast<const MCDisassembler *>(Decoder) in DecodeGPRRegisterClass()
80 const void *Decoder) { in DecodeFPR16RegisterClass() argument
91 const void *Decoder) { in DecodeFPR32RegisterClass() argument
102 const void *Decoder) { in DecodeFPR32CRegisterClass() argument
113 const void *Decoder) { in DecodeFPR64RegisterClass() argument
124 const void *Decoder) { in DecodeFPR64CRegisterClass() argument
135 const void *Decoder) { in DecodeGPRNoX0RegisterClass() argument
140 return DecodeGPRRegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoX0RegisterClass()
145 const void *Decoder) { in DecodeGPRNoX0X2RegisterClass() argument
150 return DecodeGPRNoX0RegisterClass(Inst, RegNo, Address, Decoder); in DecodeGPRNoX0X2RegisterClass()
155 const void *Decoder) { in DecodeGPRCRegisterClass() argument
166 const void *Decoder) { in DecodeVRRegisterClass() argument
177 const void *Decoder) { in DecodeVRM2RegisterClass() argument
185 static_cast<const RISCVDisassembler *>(Decoder); in DecodeVRM2RegisterClass()
197 const void *Decoder) { in DecodeVRM4RegisterClass() argument
205 static_cast<const RISCVDisassembler *>(Decoder); in DecodeVRM4RegisterClass()
217 const void *Decoder) { in DecodeVRM8RegisterClass() argument
225 static_cast<const RISCVDisassembler *>(Decoder); in DecodeVRM8RegisterClass()
236 uint64_t Address, const void *Decoder) { in decodeVMaskReg() argument
253 static void addImplySP(MCInst &Inst, int64_t Address, const void *Decoder) { in addImplySP() argument
261 DecodeGPRRegisterClass(Inst, 2, Address, Decoder); in addImplySP()
264 DecodeGPRRegisterClass(Inst, 2, Address, Decoder); in addImplySP()
265 DecodeGPRRegisterClass(Inst, 2, Address, Decoder); in addImplySP()
271 int64_t Address, const void *Decoder) { in decodeUImmOperand() argument
273 addImplySP(Inst, Address, Decoder); in decodeUImmOperand()
281 const void *Decoder) { in decodeUImmNonZeroOperand() argument
284 return decodeUImmOperand<N>(Inst, Imm, Address, Decoder); in decodeUImmNonZeroOperand()
289 int64_t Address, const void *Decoder) { in decodeSImmOperand() argument
291 addImplySP(Inst, Address, Decoder); in decodeSImmOperand()
300 const void *Decoder) { in decodeSImmNonZeroOperand() argument
303 return decodeSImmOperand<N>(Inst, Imm, Address, Decoder); in decodeSImmNonZeroOperand()
309 const void *Decoder) { in decodeSImmOperandAndLsl1() argument
320 const void *Decoder) { in decodeCLUIImmOperand() argument
331 const void *Decoder) { in decodeFRMArg() argument
341 uint64_t Address, const void *Decoder);
344 uint64_t Address, const void *Decoder);
348 const void *Decoder);
351 uint64_t Address, const void *Decoder);
355 const void *Decoder);
360 uint64_t Address, const void *Decoder) { in decodeRVCInstrSImm() argument
363 DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder); in decodeRVCInstrSImm()
371 const void *Decoder) { in decodeRVCInstrRdSImm() argument
372 DecodeGPRRegisterClass(Inst, 0, Address, Decoder); in decodeRVCInstrRdSImm()
375 DecodeStatus Result = decodeSImmOperand<6>(Inst, SImm6, Address, Decoder); in decodeRVCInstrRdSImm()
383 const void *Decoder) { in decodeRVCInstrRdRs1UImm() argument
384 DecodeGPRRegisterClass(Inst, 0, Address, Decoder); in decodeRVCInstrRdRs1UImm()
388 DecodeStatus Result = decodeUImmOperand<6>(Inst, UImm6, Address, Decoder); in decodeRVCInstrRdRs1UImm()
395 uint64_t Address, const void *Decoder) { in decodeRVCInstrRdRs2() argument
398 DecodeGPRRegisterClass(Inst, Rd, Address, Decoder); in decodeRVCInstrRdRs2()
399 DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder); in decodeRVCInstrRdRs2()
405 const void *Decoder) { in decodeRVCInstrRdRs1Rs2() argument
408 DecodeGPRRegisterClass(Inst, Rd, Address, Decoder); in decodeRVCInstrRdRs1Rs2()
410 DecodeGPRRegisterClass(Inst, Rs2, Address, Decoder); in decodeRVCInstrRdRs1Rs2()