Lines Matching refs:IDLoc
81 bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
107 unsigned SecondOpcode, SMLoc IDLoc, MCStreamer &Out);
110 void emitLoadLocalAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
113 void emitLoadAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
117 void emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
121 void emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out);
124 void emitLoadStoreSymbol(MCInst &Inst, unsigned Opcode, SMLoc IDLoc,
129 SMLoc IDLoc, MCStreamer &Out);
132 void emitVMSGE(MCInst &Inst, unsigned Opcode, SMLoc IDLoc, MCStreamer &Out);
147 bool processInstruction(MCInst &Inst, SMLoc IDLoc, OperandVector &Operands,
967 bool RISCVAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, in MatchAndEmitInstruction() argument
983 return processInstruction(Inst, IDLoc, Operands, Out); in MatchAndEmitInstruction()
995 return Error(IDLoc, Msg); in MatchAndEmitInstruction()
1001 return Error(IDLoc, "unrecognized instruction mnemonic" + Suggestion); in MatchAndEmitInstruction()
1004 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction()
1011 ErrorLoc = IDLoc; in MatchAndEmitInstruction()
1021 SMLoc ErrorLoc = IDLoc; in MatchAndEmitInstruction()
2240 unsigned SecondOpcode, SMLoc IDLoc, in emitAuipcInstPair() argument
2264 void RISCVAsmParser::emitLoadLocalAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadLocalAddress() argument
2275 RISCV::ADDI, IDLoc, Out); in emitLoadLocalAddress()
2278 void RISCVAsmParser::emitLoadAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadAddress() argument
2300 emitAuipcInstPair(DestReg, DestReg, Symbol, VKHi, SecondOpcode, IDLoc, Out); in emitLoadAddress()
2303 void RISCVAsmParser::emitLoadTLSIEAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadTLSIEAddress() argument
2315 SecondOpcode, IDLoc, Out); in emitLoadTLSIEAddress()
2318 void RISCVAsmParser::emitLoadTLSGDAddress(MCInst &Inst, SMLoc IDLoc, in emitLoadTLSGDAddress() argument
2329 RISCV::ADDI, IDLoc, Out); in emitLoadTLSGDAddress()
2333 SMLoc IDLoc, MCStreamer &Out, in emitLoadStoreSymbol() argument
2348 Opcode, IDLoc, Out); in emitLoadStoreSymbol()
2352 int64_t Width, SMLoc IDLoc, in emitPseudoExtend() argument
2380 void RISCVAsmParser::emitVMSGE(MCInst &Inst, unsigned Opcode, SMLoc IDLoc, in emitVMSGE() argument
2537 bool RISCVAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc, in processInstruction() argument
2540 Inst.setLoc(IDLoc); in processInstruction()
2567 emitLoadLocalAddress(Inst, IDLoc, Out); in processInstruction()
2570 emitLoadAddress(Inst, IDLoc, Out); in processInstruction()
2573 emitLoadTLSIEAddress(Inst, IDLoc, Out); in processInstruction()
2576 emitLoadTLSGDAddress(Inst, IDLoc, Out); in processInstruction()
2579 emitLoadStoreSymbol(Inst, RISCV::LB, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2582 emitLoadStoreSymbol(Inst, RISCV::LBU, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2585 emitLoadStoreSymbol(Inst, RISCV::LH, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2588 emitLoadStoreSymbol(Inst, RISCV::LHU, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2591 emitLoadStoreSymbol(Inst, RISCV::LW, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2594 emitLoadStoreSymbol(Inst, RISCV::LWU, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2597 emitLoadStoreSymbol(Inst, RISCV::LD, IDLoc, Out, /*HasTmpReg=*/false); in processInstruction()
2600 emitLoadStoreSymbol(Inst, RISCV::FLH, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2603 emitLoadStoreSymbol(Inst, RISCV::FLW, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2606 emitLoadStoreSymbol(Inst, RISCV::FLD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2609 emitLoadStoreSymbol(Inst, RISCV::SB, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2612 emitLoadStoreSymbol(Inst, RISCV::SH, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2615 emitLoadStoreSymbol(Inst, RISCV::SW, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2618 emitLoadStoreSymbol(Inst, RISCV::SD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2621 emitLoadStoreSymbol(Inst, RISCV::FSH, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2624 emitLoadStoreSymbol(Inst, RISCV::FSW, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2627 emitLoadStoreSymbol(Inst, RISCV::FSD, IDLoc, Out, /*HasTmpReg=*/true); in processInstruction()
2634 emitPseudoExtend(Inst, /*SignExtend=*/true, /*Width=*/8, IDLoc, Out); in processInstruction()
2637 emitPseudoExtend(Inst, /*SignExtend=*/true, /*Width=*/16, IDLoc, Out); in processInstruction()
2640 emitPseudoExtend(Inst, /*SignExtend=*/false, /*Width=*/16, IDLoc, Out); in processInstruction()
2643 emitPseudoExtend(Inst, /*SignExtend=*/false, /*Width=*/32, IDLoc, Out); in processInstruction()
2648 emitVMSGE(Inst, RISCV::VMSLTU_VX, IDLoc, Out); in processInstruction()
2653 emitVMSGE(Inst, RISCV::VMSLT_VX, IDLoc, Out); in processInstruction()