Lines Matching refs:isPPC64
96 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR, in PPCRegisterInfo()
97 TM.isPPC64() ? 0 : 1, in PPCRegisterInfo()
98 TM.isPPC64() ? 0 : 1), in PPCRegisterInfo()
152 if (TM.isPPC64()) in getPointerRegClass()
157 if (TM.isPPC64()) in getPointerRegClass()
166 if (!TM.isPPC64() && Subtarget.isAIXABI()) in getCalleeSavedRegs()
195 if (TM.isPPC64()) { in getCalleeSavedRegs()
210 if (TM.isPPC64()) { in getCalleeSavedRegs()
251 return TM.isPPC64() in getCallPreservedMask()
261 return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_SVR64_ColdCC_Altivec_RegMask in getCallPreservedMask()
269 return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_PPC64_Altivec_RegMask in getCallPreservedMask()
324 if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm()) in getReservedRegs()
335 if (TM.isPPC64()) in getReservedRegs()
644 bool LP64 = TM.isPPC64(); in lowerDynamicAlloc()
704 bool LP64 = TM.isPPC64(); in prepareDynamicAlloca()
790 bool LP64 = TM.isPPC64(); in lowerPrepareProbedAlloca()
835 bool is64Bit = TM.isPPC64(); in lowerDynamicAreaOffset()
862 bool LP64 = TM.isPPC64(); in lowerCRSpilling()
907 bool LP64 = TM.isPPC64(); in lowerCRRestore()
951 bool LP64 = TM.isPPC64(); in lowerCRBitSpilling()
1069 bool LP64 = TM.isPPC64(); in lowerCRBitRestore()
1473 bool is64Bit = TM.isPPC64(); in eliminateFrameIndex()
1519 if (!TM.isPPC64()) in getFrameRegister()
1530 if (TM.isPPC64()) in getBaseRegister()
1603 unsigned ADDriOpc = TM.isPPC64() ? PPC::ADDI8 : PPC::ADDI; in materializeFrameBaseRegister()