Lines Matching refs:isPPC64

93                       STI.isPPC64() ? PPC::BLR8 : PPC::BLR),  in PPCInstrInfo()
631 if (!(Subtarget.isPPC64() && Subtarget.hasP9Vector() && in shouldReduceRegisterPressure()
691 assert((Subtarget.isPPC64() && Subtarget.hasP9Vector() && in generateLoadForNewConst()
1276 bool isPPC64 = Subtarget.isPPC64(); in analyzeBranch() local
1342 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1353 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1410 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1424 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR, in analyzeBranch()
1490 bool isPPC64 = Subtarget.isPPC64(); in insertBranch() local
1498 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
1499 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in insertBranch()
1515 (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) : in insertBranch()
1516 (isPPC64 ? PPC::BDZ8 : PPC::BDZ))).addMBB(TBB); in insertBranch()
2111 bool isPPC64 = Subtarget.isPPC64(); in onlyFoldImmediate() local
2112 ZeroReg = isPPC64 ? PPC::ZERO8 : PPC::ZERO; in onlyFoldImmediate()
2183 bool isPPC64 = Subtarget.isPPC64(); in PredicateInstruction() local
2184 MI.setDesc(get(Pred[0].getImm() ? (isPPC64 ? PPC::BDNZLR8 : PPC::BDNZLR) in PredicateInstruction()
2185 : (isPPC64 ? PPC::BDZLR8 : PPC::BDZLR))); in PredicateInstruction()
2206 bool isPPC64 = Subtarget.isPPC64(); in PredicateInstruction() local
2207 MI.setDesc(get(Pred[0].getImm() ? (isPPC64 ? PPC::BDNZ8 : PPC::BDNZ) in PredicateInstruction()
2208 : (isPPC64 ? PPC::BDZ8 : PPC::BDZ))); in PredicateInstruction()
2247 bool isPPC64 = Subtarget.isPPC64(); in PredicateInstruction() local
2250 MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8 : PPC::BCCTR8) in PredicateInstruction()
2254 MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCTRL8n : PPC::BCCTR8n) in PredicateInstruction()
2258 MI.setDesc(get(isPPC64 ? (setLR ? PPC::BCCCTRL8 : PPC::BCCCTR8) in PredicateInstruction()
2268 .addReg(isPPC64 ? PPC::LR8 : PPC::LR, RegState::Implicit) in PredicateInstruction()
2269 .addReg(isPPC64 ? PPC::LR8 : PPC::LR, RegState::ImplicitDefine); in PredicateInstruction()
2398 bool isPPC64 = Subtarget.isPPC64(); in optimizeCompareInstr() local
2414 if (isPPC64) { in optimizeCompareInstr()
3026 const int64_t Offset = Subtarget.isPPC64() ? -0x7010 : -0x7008; in expandPostRAPseudo()
3027 const unsigned Reg = Subtarget.isPPC64() ? PPC::X13 : PPC::R2; in expandPostRAPseudo()
3028 MI.setDesc(get(Subtarget.isPPC64() ? PPC::LD : PPC::LWZ)); in expandPostRAPseudo()
5184 Register SPReg = Subtarget.isPPC64() ? PPC::X1 : PPC::R1; in isTOCSaveMI()
5357 return (Opcode == (Subtarget.isPPC64() ? PPC::BDNZ8 : PPC::BDNZ)); in isBDNZ()
5394 MF->getSubtarget<PPCSubtarget>().isPPC64() ? PPC::CTR8 : PPC::CTR, in createTripCountGreaterCondition()
5454 unsigned LOOPi = (Subtarget.isPPC64() ? PPC::MTCTR8loop : PPC::MTCTRloop); in findLoopInstr()