Lines Matching refs:PPCInstrInfo
88 void PPCInstrInfo::anchor() {} in anchor()
90 PPCInstrInfo::PPCInstrInfo(PPCSubtarget &STI) in PPCInstrInfo() function in PPCInstrInfo
99 PPCInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI, in CreateTargetHazardRecognizer()
116 PPCInstrInfo::CreateTargetPostRAHazardRecognizer(const InstrItineraryData *II, in CreateTargetPostRAHazardRecognizer()
136 unsigned PPCInstrInfo::getInstrLatency(const InstrItineraryData *ItinData, in getInstrLatency()
166 int PPCInstrInfo::getOperandLatency(const InstrItineraryData *ItinData, in getOperandLatency()
221 void PPCInstrInfo::setSpecialOperandAttr(MachineInstr &OldMI1, in setSpecialOperandAttr()
239 void PPCInstrInfo::setSpecialOperandAttr(MachineInstr &MI, in setSpecialOperandAttr()
252 bool PPCInstrInfo::isAssociativeAndCommutative(const MachineInstr &Inst) const { in isAssociativeAndCommutative()
312 int16_t PPCInstrInfo::getFMAOpIdxInfo(unsigned Opcode) const { in getFMAOpIdxInfo()
367 bool PPCInstrInfo::getFMAPatterns( in getFMAPatterns()
543 void PPCInstrInfo::finalizeInsInstrs( in finalizeInsInstrs()
613 bool PPCInstrInfo::shouldReduceRegisterPressure( in shouldReduceRegisterPressure()
675 bool PPCInstrInfo::isLoadFromConstantPool(MachineInstr *I) const { in isLoadFromConstantPool()
685 Register PPCInstrInfo::generateLoadForNewConst( in generateLoadForNewConst()
739 PPCInstrInfo::getConstantFromConstantPool(MachineInstr *I) const { in getConstantFromConstantPool()
759 bool PPCInstrInfo::getMachineCombinerPatterns( in getMachineCombinerPatterns()
774 void PPCInstrInfo::genAlternativeCodeSequence( in genAlternativeCodeSequence()
794 void PPCInstrInfo::reassociateFMA( in reassociateFMA()
1054 bool PPCInstrInfo::isCoalescableExtInstr(const MachineInstr &MI, in isCoalescableExtInstr()
1069 unsigned PPCInstrInfo::isLoadFromStackSlot(const MachineInstr &MI, in isLoadFromStackSlot()
1089 bool PPCInstrInfo::isReallyTriviallyReMaterializable(const MachineInstr &MI, in isReallyTriviallyReMaterializable()
1126 unsigned PPCInstrInfo::isStoreToStackSlot(const MachineInstr &MI, in isStoreToStackSlot()
1142 MachineInstr *PPCInstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI, in commuteInstructionImpl()
1226 bool PPCInstrInfo::findCommutedOpIndices(const MachineInstr &MI, in findCommutedOpIndices()
1242 void PPCInstrInfo::insertNoop(MachineBasicBlock &MBB, in insertNoop()
1262 MCInst PPCInstrInfo::getNop() const { in getNop()
1271 bool PPCInstrInfo::analyzeBranch(MachineBasicBlock &MBB, in analyzeBranch()
1446 unsigned PPCInstrInfo::removeBranch(MachineBasicBlock &MBB, in removeBranch()
1478 unsigned PPCInstrInfo::insertBranch(MachineBasicBlock &MBB, in insertBranch()
1531 bool PPCInstrInfo::canInsertSelect(const MachineBasicBlock &MBB, in canInsertSelect()
1569 void PPCInstrInfo::insertSelect(MachineBasicBlock &MBB, in insertSelect()
1681 void PPCInstrInfo::copyPhysReg(MachineBasicBlock &MBB, in copyPhysReg()
1864 unsigned PPCInstrInfo::getSpillIndex(const TargetRegisterClass *RC) const { in getSpillIndex()
1914 PPCInstrInfo::getStoreOpcodeForSpill(const TargetRegisterClass *RC) const { in getStoreOpcodeForSpill()
1920 PPCInstrInfo::getLoadOpcodeForSpill(const TargetRegisterClass *RC) const { in getLoadOpcodeForSpill()
1925 void PPCInstrInfo::StoreRegToStackSlot( in StoreRegToStackSlot()
1947 void PPCInstrInfo::storeRegToStackSlotNoUpd( in storeRegToStackSlotNoUpd()
1967 void PPCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, in storeRegToStackSlot()
1984 void PPCInstrInfo::LoadRegFromStackSlot(MachineFunction &MF, const DebugLoc &DL, in LoadRegFromStackSlot()
2002 void PPCInstrInfo::loadRegFromStackSlotNoUpd( in loadRegFromStackSlotNoUpd()
2027 void PPCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, in loadRegFromStackSlot()
2044 bool PPCInstrInfo::
2058 bool PPCInstrInfo::onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in onlyFoldImmediate()
2125 bool PPCInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI, in FoldImmediate()
2147 bool PPCInstrInfo::isProfitableToIfCvt(MachineBasicBlock &TMBB, in isProfitableToIfCvt()
2156 bool PPCInstrInfo::isPredicated(const MachineInstr &MI) const { in isPredicated()
2167 bool PPCInstrInfo::isSchedulingBoundary(const MachineInstr &MI, in isSchedulingBoundary()
2178 bool PPCInstrInfo::PredicateInstruction(MachineInstr &MI, in PredicateInstruction()
2277 bool PPCInstrInfo::SubsumesPredicate(ArrayRef<MachineOperand> Pred1, in SubsumesPredicate()
2308 bool PPCInstrInfo::ClobbersPredicate(MachineInstr &MI, in ClobbersPredicate()
2345 bool PPCInstrInfo::analyzeCompare(const MachineInstr &MI, Register &SrcReg, in analyzeCompare()
2375 bool PPCInstrInfo::optimizeCompareInstr(MachineInstr &CmpInstr, Register SrcReg, in optimizeCompareInstr()
2754 bool PPCInstrInfo::getMemOperandsWithOffsetWidth( in getMemOperandsWithOffsetWidth()
2805 bool PPCInstrInfo::shouldClusterMemOps( in shouldClusterMemOps()
2863 unsigned PPCInstrInfo::getInstSizeInBytes(const MachineInstr &MI) const { in getInstSizeInBytes()
2882 PPCInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const { in decomposeMachineOperandsTargetFlags()
2888 PPCInstrInfo::getSerializableDirectMachineOperandTargetFlags() const { in getSerializableDirectMachineOperandTargetFlags()
2903 PPCInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const { in getSerializableBitmaskMachineOperandTargetFlags()
2927 bool PPCInstrInfo::expandVSXMemPseudo(MachineInstr &MI) const { in expandVSXMemPseudo()
2993 bool PPCInstrInfo::expandPostRAPseudo(MachineInstr &MI) const { in expandPostRAPseudo()
3155 void PPCInstrInfo::replaceInstrOperandWithImm(MachineInstr &MI, in replaceInstrOperandWithImm()
3186 void PPCInstrInfo::replaceInstrWithLI(MachineInstr &MI, in replaceInstrWithLI()
3209 MachineInstr *PPCInstrInfo::getDefMIPostRA(unsigned Reg, MachineInstr &MI, in getDefMIPostRA()
3226 MachineInstr *PPCInstrInfo::getForwardingDefMI( in getForwardingDefMI()
3313 unsigned PPCInstrInfo::getSpillTarget() const { in getSpillTarget()
3320 const unsigned *PPCInstrInfo::getStoreOpcodesForSpillArray() const { in getStoreOpcodesForSpillArray()
3324 const unsigned *PPCInstrInfo::getLoadOpcodesForSpillArray() const { in getLoadOpcodesForSpillArray()
3328 void PPCInstrInfo::fixupIsDeadOrKill(MachineInstr *StartMI, MachineInstr *EndMI, in fixupIsDeadOrKill()
3447 bool PPCInstrInfo::foldFrameOffset(MachineInstr &MI) const { in foldFrameOffset()
3544 bool PPCInstrInfo::isADDIInstrEligibleForFolding(MachineInstr &ADDIMI, in isADDIInstrEligibleForFolding()
3561 bool PPCInstrInfo::isADDInstrEligibleForFolding(MachineInstr &ADDMI) const { in isADDInstrEligibleForFolding()
3568 bool PPCInstrInfo::isImmInstrEligibleForFolding(MachineInstr &MI, in isImmInstrEligibleForFolding()
3611 bool PPCInstrInfo::isValidToBeChangedReg(MachineInstr *ADDMI, unsigned Index, in isValidToBeChangedReg()
3656 bool PPCInstrInfo::convertToImmediateForm(MachineInstr &MI, in convertToImmediateForm()
3708 bool PPCInstrInfo::combineRLWINM(MachineInstr &MI, in combineRLWINM()
3845 bool PPCInstrInfo::instrHasImmForm(unsigned Opc, bool IsVFReg, in instrHasImmForm()
4307 bool PPCInstrInfo::isUseMIElgibleForForwarding(MachineInstr &MI, in isUseMIElgibleForForwarding()
4345 bool PPCInstrInfo::isDefMIElgibleForForwarding(MachineInstr &DefMI, in isDefMIElgibleForForwarding()
4368 bool PPCInstrInfo::isRegElgibleForForwarding( in isRegElgibleForForwarding()
4407 bool PPCInstrInfo::isImmElgibleForForwarding(const MachineOperand &ImmMO, in isImmElgibleForForwarding()
4459 bool PPCInstrInfo::simplifyToLI(MachineInstr &MI, MachineInstr &DefMI, in simplifyToLI()
4702 bool PPCInstrInfo::transformToNewImmFormFedByAdd( in transformToNewImmFormFedByAdd()
4804 bool PPCInstrInfo::transformToImmFormFedByAdd( in transformToImmFormFedByAdd()
4916 bool PPCInstrInfo::transformToImmFormFedByLI(MachineInstr &MI, in transformToImmFormFedByLI()
5069 PPCInstrInfo::updatedRC(const TargetRegisterClass *RC) const { in updatedRC()
5075 int PPCInstrInfo::getRecordFormOpcode(unsigned Opcode) { in getRecordFormOpcode()
5178 bool PPCInstrInfo::isTOCSaveMI(const MachineInstr &MI) const { in isTOCSaveMI()
5196 PPCInstrInfo::isSignOrZeroExtended(const MachineInstr &MI, bool SignExt, in isSignOrZeroExtended()
5356 bool PPCInstrInfo::isBDNZ(unsigned Opcode) const { in isBDNZ()
5430 PPCInstrInfo::analyzeLoopForPipelining(MachineBasicBlock *LoopBB) const { in analyzeLoopForPipelining()
5450 MachineInstr *PPCInstrInfo::findLoopInstr( in findLoopInstr()
5465 bool PPCInstrInfo::getMemOperandWithOffsetWidth( in getMemOperandWithOffsetWidth()
5488 bool PPCInstrInfo::areMemAccessesTriviallyDisjoint( in areMemAccessesTriviallyDisjoint()