Lines Matching refs:Base
237 uint64_t Base = Imm >> 16; in decodeMemRIOperands() local
240 assert(Base < 32 && "Invalid base register"); in decodeMemRIOperands()
251 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
258 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
263 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIOperands()
272 uint64_t Base = Imm >> 14; in decodeMemRIXOperands() local
275 assert(Base < 32 && "Invalid base register"); in decodeMemRIXOperands()
279 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
281 Inst.insert(Inst.begin(), MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
284 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIXOperands()
295 const uint64_t Base = Imm >> 6; in decodeMemRIHashOperands() local
298 assert(Base < 32 && "Invalid base register"); in decodeMemRIHashOperands()
301 Inst.addOperand(MCOperand::createReg(RRegs[Base])); in decodeMemRIHashOperands()
310 uint64_t Base = Imm >> 12; in decodeMemRIX16Operands() local
313 assert(Base < 32 && "Invalid base register"); in decodeMemRIX16Operands()
316 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRIX16Operands()
325 uint64_t Base = Imm >> 34; in decodeMemRI34PCRelOperands() local
328 assert(Base < 32 && "Invalid base register"); in decodeMemRI34PCRelOperands()
331 return decodeImmZeroOperand(Inst, Base, Address, Decoder); in decodeMemRI34PCRelOperands()
339 uint64_t Base = Imm >> 34; in decodeMemRI34Operands() local
342 assert(Base < 32 && "Invalid base register"); in decodeMemRI34Operands()
345 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeMemRI34Operands()
354 uint64_t Base = Imm >> 5; in decodeSPE8Operands() local
357 assert(Base < 32 && "Invalid base register"); in decodeSPE8Operands()
360 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE8Operands()
369 uint64_t Base = Imm >> 5; in decodeSPE4Operands() local
372 assert(Base < 32 && "Invalid base register"); in decodeSPE4Operands()
375 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE4Operands()
384 uint64_t Base = Imm >> 5; in decodeSPE2Operands() local
387 assert(Base < 32 && "Invalid base register"); in decodeSPE2Operands()
390 Inst.addOperand(MCOperand::createReg(RRegsNoR0[Base])); in decodeSPE2Operands()