Lines Matching refs:Ws

2672   SDValue Ws;  in lowerVECTOR_SHUFFLE_ILVEV()  local
2688 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVEV()
2690 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVEV()
2694 return DAG.getNode(MipsISD::ILVEV, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVEV()
2718 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVOD() local
2734 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVOD()
2736 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVOD()
2740 return DAG.getNode(MipsISD::ILVOD, SDLoc(Op), ResTy, Wt, Ws); in lowerVECTOR_SHUFFLE_ILVOD()
2765 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVR() local
2781 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVR()
2783 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVR()
2787 return DAG.getNode(MipsISD::ILVR, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVR()
2813 SDValue Ws; in lowerVECTOR_SHUFFLE_ILVL() local
2829 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_ILVL()
2832 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_ILVL()
2836 return DAG.getNode(MipsISD::ILVL, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_ILVL()
2860 SDValue Ws; in lowerVECTOR_SHUFFLE_PCKEV() local
2873 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_PCKEV()
2875 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_PCKEV()
2879 return DAG.getNode(MipsISD::PCKEV, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_PCKEV()
2903 SDValue Ws; in lowerVECTOR_SHUFFLE_PCKOD() local
2916 Ws = Op->getOperand(0); in lowerVECTOR_SHUFFLE_PCKOD()
2918 Ws = Op->getOperand(1); in lowerVECTOR_SHUFFLE_PCKOD()
2922 return DAG.getNode(MipsISD::PCKOD, SDLoc(Op), ResTy, Ws, Wt); in lowerVECTOR_SHUFFLE_PCKOD()
3175 Register Ws = MI.getOperand(1).getReg(); in emitCOPY_FW() local
3179 unsigned Wt = Ws; in emitCOPY_FW()
3185 BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Wt).addReg(Ws); in emitCOPY_FW()
3194 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_W), Wt).addReg(Ws).addImm(Lane); in emitCOPY_FW()
3220 Register Ws = MI.getOperand(1).getReg(); in emitCOPY_FD() local
3225 BuildMI(*BB, MI, DL, TII->get(Mips::COPY), Fd).addReg(Ws, 0, Mips::sub_64); in emitCOPY_FD()
3229 BuildMI(*BB, MI, DL, TII->get(Mips::SPLATI_D), Wt).addReg(Ws).addImm(1); in emitCOPY_FD()
3514 Register Ws = MI.getOperand(0).getReg(); in emitST_F16_PSEUDO() local
3529 BuildMI(*BB, MI, DL, TII->get(Mips::COPY_U_H), Rs).addReg(Ws).addImm(0); in emitST_F16_PSEUDO()
3769 Register Ws = MI.getOperand(1).getReg(); in emitFPEXTEND_PSEUDO() local
3782 BuildMI(*BB, MI, DL, TII->get(Mips::FEXUPR_W), Wtemp).addReg(Ws); in emitFPEXTEND_PSEUDO()