Lines Matching refs:GPR32RegClass

68   addRegisterClass(MVT::i32, &Mips::GPR32RegClass);  in MipsSETargetLowering()
3038   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in emitBPOSGE32()
3107   const TargetRegisterClass *RC = &Mips::GPR32RegClass;  in emitMSACBranchPseudo()
3339       Subtarget.isABI_N64() ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitINSERT_DF_VIDX()
3524                                : (Subtarget.isABI_O32() ? &Mips::GPR32RegClass  in emitST_F16_PSEUDO()
3526   const bool UsingMips32 = RC == &Mips::GPR32RegClass;  in emitST_F16_PSEUDO()
3527   Register Rs = RegInfo.createVirtualRegister(&Mips::GPR32RegClass);  in emitST_F16_PSEUDO()
3576                                : (Subtarget.isABI_O32() ? &Mips::GPR32RegClass  in emitLD_F16_PSEUDO()
3579   const bool UsingMips32 = RC == &Mips::GPR32RegClass;  in emitLD_F16_PSEUDO()
3588     Register Tmp = RegInfo.createVirtualRegister(&Mips::GPR32RegClass);  in emitLD_F16_PSEUDO()
3669       IsFGR64onMips64 ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitFPROUND_PSEUDO()
3773       IsFGR64onMips64 ? &Mips::GPR64RegClass : &Mips::GPR32RegClass;  in emitFPEXTEND_PSEUDO()