182     Register Reg, const MachineRegisterInfo &MRI) {  in addDefUses()  argument
183   assert(!MRI.getType(Reg).isPointer() &&  in addDefUses()
185   for (MachineInstr &UseMI : MRI.use_instructions(Reg)) {  in addDefUses()
190       addDefUses(NonCopyInstr->getOperand(0).getReg(), MRI);  in addDefUses()
197     Register Reg, const MachineRegisterInfo &MRI) {  in addUseDef()  argument
198   assert(!MRI.getType(Reg).isPointer() &&  in addUseDef()
200   MachineInstr *DefMI = MRI.getVRegDef(Reg);  in addUseDef()
208   const MachineRegisterInfo &MRI = MF.getRegInfo();  in skipCopiesOutgoing()  local
212          MRI.hasOneUse(Ret->getOperand(0).getReg())) {  in skipCopiesOutgoing()
213     Ret = &(*MRI.use_instr_begin(Ret->getOperand(0).getReg()));  in skipCopiesOutgoing()
222   const MachineRegisterInfo &MRI = MF.getRegInfo();  in skipCopiesIncoming()  local
226     Ret = MRI.getVRegDef(Ret->getOperand(1).getReg());  in skipCopiesIncoming()
235   const MachineRegisterInfo &MRI = MI->getMF()->getRegInfo();  in AmbiguousRegDefUseContainer()  local
238     addDefUses(MI->getOperand(0).getReg(), MRI);  in AmbiguousRegDefUseContainer()
241     addUseDef(MI->getOperand(0).getReg(), MRI);  in AmbiguousRegDefUseContainer()
244     addDefUses(MI->getOperand(0).getReg(), MRI);  in AmbiguousRegDefUseContainer()
247       addUseDef(MI->getOperand(i).getReg(), MRI);  in AmbiguousRegDefUseContainer()
251     addDefUses(MI->getOperand(0).getReg(), MRI);  in AmbiguousRegDefUseContainer()
253     addUseDef(MI->getOperand(2).getReg(), MRI);  in AmbiguousRegDefUseContainer()
254     addUseDef(MI->getOperand(3).getReg(), MRI);  in AmbiguousRegDefUseContainer()
258     addDefUses(MI->getOperand(0).getReg(), MRI);  in AmbiguousRegDefUseContainer()
261     addUseDef(MI->getOperand(MI->getNumOperands() - 1).getReg(), MRI);  in AmbiguousRegDefUseContainer()
264       addDefUses(MI->getOperand(0).getReg(), MRI);  in AmbiguousRegDefUseContainer()
369   const MachineRegisterInfo &MRI = MF.getRegInfo();  in setTypesAccordingToPhysicalRegister()  local
374       RBI.getRegBank(CopyInst->getOperand(Op).getReg(), MRI, TRI);  in setTypesAccordingToPhysicalRegister()
435   const MachineRegisterInfo &MRI = MF.getRegInfo();  in getInstrMapping()  local
453       LLT RegTy = MRI.getType(Op.getReg());  in getInstrMapping()
464   const LLT Op0Ty = MRI.getType(MI.getOperand(0).getReg());  in getInstrMapping()
582     unsigned Op3Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();  in getInstrMapping()
620     unsigned Op2Size = MRI.getType(MI.getOperand(2).getReg()).getSizeInBits();  in getInstrMapping()
636     unsigned SizeFP = MRI.getType(MI.getOperand(1).getReg()).getSizeInBits();  in getInstrMapping()
642     assert((MRI.getType(MI.getOperand(1).getReg()).getSizeInBits() == 32) &&  in getInstrMapping()
692                                       MachineRegisterInfo &MRI) const {  in setRegBank()
703     assert(MRI.getType(Dest) == LLT::scalar(32) && "Unexpected operand type.");  in setRegBank()
704     MRI.setRegBank(Dest, getRegBank(Mips::GPRBRegBankID));  in setRegBank()
708     assert(MRI.getType(Dest).isPointer() && "Unexpected operand type.");  in setRegBank()
709     MRI.setRegBank(Dest, getRegBank(Mips::GPRBRegBankID));  in setRegBank()
733   MachineRegisterInfo &MRI = OpdMapper.getMRI();  in applyMappingImpl()  local
762         setRegBank(*NewMI, MRI);  in applyMappingImpl()