Lines Matching refs:ST
66 MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) { in MipsLegalizerInfo() argument
81 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
84 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
105 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
108 {s32, p0, 16, ST.systemSupportsUnalignedAccess()}, in MipsLegalizerInfo()
111 {s64, p0, 64, ST.systemSupportsUnalignedAccess()}})) in MipsLegalizerInfo()
113 if (ST.hasMSA() && CheckTy0Ty1MemSizeAlign( in MipsLegalizerInfo()
124 .customIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
139 if (!ST.systemSupportsUnalignedAccess() && in MipsLegalizerInfo()
197 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
200 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
240 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
241 if (ST.hasMips32r2() && CheckTyN(0, Query, {s32})) in MipsLegalizerInfo()
245 .lowerIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
246 if (!ST.hasMips32r2() && CheckTyN(0, Query, {s32})) in MipsLegalizerInfo()
280 .legalIf([=, &ST](const LegalityQuery &Query) { in MipsLegalizerInfo()
283 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
328 verify(*ST.getInstrInfo()); in MipsLegalizerInfo()
466 const MipsSubtarget &ST) { in SelectMSA3OpIntrinsic() argument
467 assert(ST.hasMSA() && "MSA intrinsic not supported on target without MSA."); in SelectMSA3OpIntrinsic()
472 .constrainAllUses(MIRBuilder.getTII(), *ST.getRegisterInfo(), in SelectMSA3OpIntrinsic()
473 *ST.getRegBankInfo())) in SelectMSA3OpIntrinsic()
481 const MipsSubtarget &ST) { in MSA3OpIntrinsicToGeneric() argument
482 assert(ST.hasMSA() && "MSA intrinsic not supported on target without MSA."); in MSA3OpIntrinsicToGeneric()
493 const MipsSubtarget &ST) { in MSA2OpIntrinsicToGeneric() argument
494 assert(ST.hasMSA() && "MSA intrinsic not supported on target without MSA."); in MSA2OpIntrinsicToGeneric()
505 const MipsSubtarget &ST = in legalizeIntrinsic() local
507 const MipsInstrInfo &TII = *ST.getInstrInfo(); in legalizeIntrinsic()
508 const MipsRegisterInfo &TRI = *ST.getRegisterInfo(); in legalizeIntrinsic()
509 const RegisterBankInfo &RBI = *ST.getRegBankInfo(); in legalizeIntrinsic()
534 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_ADD, MIRBuilder, ST); in legalizeIntrinsic()
536 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_B, MIRBuilder, ST); in legalizeIntrinsic()
538 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_H, MIRBuilder, ST); in legalizeIntrinsic()
540 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_W, MIRBuilder, ST); in legalizeIntrinsic()
542 return SelectMSA3OpIntrinsic(MI, Mips::ADDVI_D, MIRBuilder, ST); in legalizeIntrinsic()
547 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SUB, MIRBuilder, ST); in legalizeIntrinsic()
549 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_B, MIRBuilder, ST); in legalizeIntrinsic()
551 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_H, MIRBuilder, ST); in legalizeIntrinsic()
553 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_W, MIRBuilder, ST); in legalizeIntrinsic()
555 return SelectMSA3OpIntrinsic(MI, Mips::SUBVI_D, MIRBuilder, ST); in legalizeIntrinsic()
560 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_MUL, MIRBuilder, ST); in legalizeIntrinsic()
565 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SDIV, MIRBuilder, ST); in legalizeIntrinsic()
570 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_SREM, MIRBuilder, ST); in legalizeIntrinsic()
575 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_UDIV, MIRBuilder, ST); in legalizeIntrinsic()
580 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_UREM, MIRBuilder, ST); in legalizeIntrinsic()
583 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FADD, MIRBuilder, ST); in legalizeIntrinsic()
586 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FSUB, MIRBuilder, ST); in legalizeIntrinsic()
589 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FMUL, MIRBuilder, ST); in legalizeIntrinsic()
592 return MSA3OpIntrinsicToGeneric(MI, TargetOpcode::G_FDIV, MIRBuilder, ST); in legalizeIntrinsic()
594 return SelectMSA3OpIntrinsic(MI, Mips::FMAX_A_W, MIRBuilder, ST); in legalizeIntrinsic()
596 return SelectMSA3OpIntrinsic(MI, Mips::FMAX_A_D, MIRBuilder, ST); in legalizeIntrinsic()
598 return MSA2OpIntrinsicToGeneric(MI, TargetOpcode::G_FSQRT, MIRBuilder, ST); in legalizeIntrinsic()
600 return MSA2OpIntrinsicToGeneric(MI, TargetOpcode::G_FSQRT, MIRBuilder, ST); in legalizeIntrinsic()