Lines Matching refs:GPR32RegClass
4124 return std::make_pair(0U, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4127 return std::make_pair(0U, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4151 return std::make_pair((unsigned)Mips::T9, &Mips::GPR32RegClass); in getRegForInlineAsmConstraint()
4768 Register Temp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4777 Register LoadHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4778 Register LoadFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4779 Register Undef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_W()
4823 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4824 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4842 Register LoHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4843 Register LoFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4844 Register LoUndef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4845 Register HiHalf = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4846 Register HiFull = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4847 Register HiUndef = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitLDR_D()
4899 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_W()
4912 Register Tmp = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_W()
4964 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
4965 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
4990 Register Lo = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()
4991 Register Hi = MRI.createVirtualRegister(&Mips::GPR32RegClass); in emitSTR_D()