Lines Matching refs:createResultReg
328 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLogicalOp()
344 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in fastMaterializeAlloca()
365 unsigned ResultReg = createResultReg(RC); in materialize32BitInt()
379 unsigned TmpReg = createResultReg(RC); in materialize32BitInt()
394 unsigned DestReg = createResultReg(RC); in materializeFP()
400 unsigned DestReg = createResultReg(RC); in materializeFP()
415 unsigned DestReg = createResultReg(RC); in materializeGV()
426 unsigned TempReg = createResultReg(RC); in materializeGV()
437 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym()
652 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
658 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
670 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
676 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
688 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
694 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitCmp()
740 unsigned RegWithZero = createResultReg(&Mips::GPR32RegClass); in emitCmp()
741 unsigned RegWithOne = createResultReg(&Mips::GPR32RegClass); in emitCmp()
764 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
768 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
772 ResultReg = createResultReg(&Mips::GPR32RegClass); in emitLoad()
778 ResultReg = createResultReg(&Mips::FGR32RegClass); in emitLoad()
784 ResultReg = createResultReg(&Mips::AFGR64RegClass); in emitLoad()
959 ZExtCondReg = createResultReg(&Mips::GPR32RegClass); in selectBranch()
985 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectCmp()
1009 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt()
1051 unsigned ZExtCondReg = createResultReg(&Mips::GPR32RegClass); in selectSelect()
1058 unsigned ResultReg = createResultReg(RC); in selectSelect()
1059 unsigned TempReg = createResultReg(RC); in selectSelect()
1086 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc()
1124 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt()
1125 unsigned TempReg = createResultReg(&Mips::FGR32RegClass); in selectFPToInt()
1297 unsigned ResultReg = createResultReg(TLI.getRegClassFor(CopyVT)); in finishCall()
1469 unsigned ResultReg = createResultReg(Allocation[ArgNo].RC); in fastLowerArguments()
1600 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1611 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1624 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1632 TempReg[i] = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall()
1821 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectIntExt()
1842 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in emitIntSExt32r1()
1910 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in emitIntExt()
1946 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectDivRem()
1965 unsigned ResultReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
1977 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in selectShift()
2103 unsigned TempReg = createResultReg(&Mips::GPR32RegClass); in getRegEnsuringSimpleIntegerWidening()
2115 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in simplifyAddress()
2132 unsigned ResultReg = createResultReg(RC); in fastEmitInst_rr()