395     unsigned TempReg = materialize32BitInt(Imm, &Mips::GPR32RegClass);  in materializeFP()  local
396     emitInst(Mips::MTC1, DestReg).addReg(TempReg);  in materializeFP()
426     unsigned TempReg = createResultReg(RC);  in materializeGV()  local
427     emitInst(Mips::ADDiu, TempReg)  in materializeGV()
430     DestReg = TempReg;  in materializeGV()
652     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitCmp()  local
653     emitInst(Mips::XOR, TempReg).addReg(LeftReg).addReg(RightReg);  in emitCmp()
654     emitInst(Mips::SLTiu, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
658     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitCmp()  local
659     emitInst(Mips::XOR, TempReg).addReg(LeftReg).addReg(RightReg);  in emitCmp()
660     emitInst(Mips::SLTu, ResultReg).addReg(Mips::ZERO).addReg(TempReg);  in emitCmp()
670     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitCmp()  local
671     emitInst(Mips::SLTu, TempReg).addReg(LeftReg).addReg(RightReg);  in emitCmp()
672     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
676     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitCmp()  local
677     emitInst(Mips::SLTu, TempReg).addReg(RightReg).addReg(LeftReg);  in emitCmp()
678     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
688     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitCmp()  local
689     emitInst(Mips::SLT, TempReg).addReg(LeftReg).addReg(RightReg);  in emitCmp()
690     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
694     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitCmp()  local
695     emitInst(Mips::SLT, TempReg).addReg(RightReg).addReg(LeftReg);  in emitCmp()
696     emitInst(Mips::XORi, ResultReg).addReg(TempReg).addImm(1);  in emitCmp()
1059   unsigned TempReg = createResultReg(RC);  in selectSelect()  local
1061   if (!ResultReg || !TempReg)  in selectSelect()
1064   emitInst(TargetOpcode::COPY, TempReg).addReg(Src2Reg);  in selectSelect()
1066     .addReg(Src1Reg).addReg(ZExtCondReg).addReg(TempReg);  in selectSelect()
1125   unsigned TempReg = createResultReg(&Mips::FGR32RegClass);  in selectFPToInt()  local
1129   emitInst(Opc, TempReg).addReg(SrcReg);  in selectFPToInt()
1130   emitInst(Mips::MFC1, DestReg).addReg(TempReg);  in selectFPToInt()
1609         unsigned TempReg[3];  in fastLowerIntrinsicCall()  local
1611           TempReg[i] = createResultReg(&Mips::GPR32RegClass);  in fastLowerIntrinsicCall()
1612           if (TempReg[i] == 0)  in fastLowerIntrinsicCall()
1615         emitInst(Mips::SLL, TempReg[0]).addReg(SrcReg).addImm(8);  in fastLowerIntrinsicCall()
1616         emitInst(Mips::SRL, TempReg[1]).addReg(SrcReg).addImm(8);  in fastLowerIntrinsicCall()
1617         emitInst(Mips::OR, TempReg[2]).addReg(TempReg[0]).addReg(TempReg[1]);  in fastLowerIntrinsicCall()
1618         emitInst(Mips::ANDi, DestReg).addReg(TempReg[2]).addImm(0xFFFF);  in fastLowerIntrinsicCall()
1624         unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in fastLowerIntrinsicCall()  local
1625         emitInst(Mips::WSBH, TempReg).addReg(SrcReg);  in fastLowerIntrinsicCall()
1626         emitInst(Mips::ROTR, DestReg).addReg(TempReg).addImm(16);  in fastLowerIntrinsicCall()
1630         unsigned TempReg[8];  in fastLowerIntrinsicCall()  local
1632           TempReg[i] = createResultReg(&Mips::GPR32RegClass);  in fastLowerIntrinsicCall()
1633           if (TempReg[i] == 0)  in fastLowerIntrinsicCall()
1637         emitInst(Mips::SRL, TempReg[0]).addReg(SrcReg).addImm(8);  in fastLowerIntrinsicCall()
1638         emitInst(Mips::SRL, TempReg[1]).addReg(SrcReg).addImm(24);  in fastLowerIntrinsicCall()
1639         emitInst(Mips::ANDi, TempReg[2]).addReg(TempReg[0]).addImm(0xFF00);  in fastLowerIntrinsicCall()
1640         emitInst(Mips::OR, TempReg[3]).addReg(TempReg[1]).addReg(TempReg[2]);  in fastLowerIntrinsicCall()
1642         emitInst(Mips::ANDi, TempReg[4]).addReg(SrcReg).addImm(0xFF00);  in fastLowerIntrinsicCall()
1643         emitInst(Mips::SLL, TempReg[5]).addReg(TempReg[4]).addImm(8);  in fastLowerIntrinsicCall()
1645         emitInst(Mips::SLL, TempReg[6]).addReg(SrcReg).addImm(24);  in fastLowerIntrinsicCall()
1646         emitInst(Mips::OR, TempReg[7]).addReg(TempReg[3]).addReg(TempReg[5]);  in fastLowerIntrinsicCall()
1647         emitInst(Mips::OR, DestReg).addReg(TempReg[6]).addReg(TempReg[7]);  in fastLowerIntrinsicCall()
1842   unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in emitIntSExt32r1()  local
1843   emitInst(Mips::SLL, TempReg).addReg(SrcReg).addImm(ShiftAmt);  in emitIntSExt32r1()
1844   emitInst(Mips::SRA, DestReg).addReg(TempReg).addImm(ShiftAmt);  in emitIntSExt32r1()
1977     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in selectShift()  local
1978     if (!TempReg)  in selectShift()
1983     if (!emitIntExt(Op0MVT, Op0Reg, MVT::i32, TempReg, IsZExt))  in selectShift()
1986     Op0Reg = TempReg;  in selectShift()
2103     unsigned TempReg = createResultReg(&Mips::GPR32RegClass);  in getRegEnsuringSimpleIntegerWidening()  local
2104     if (!emitIntExt(VMVT, VReg, MVT::i32, TempReg, IsUnsigned))  in getRegEnsuringSimpleIntegerWidening()
2106     VReg = TempReg;  in getRegEnsuringSimpleIntegerWidening()
2113     unsigned TempReg =  in simplifyAddress()  local
2116     emitInst(Mips::ADDu, DestReg).addReg(TempReg).addReg(Addr.getReg());  in simplifyAddress()