Lines Matching refs:Mips
380 unsigned JR = ABI.IsN64() ? Mips::JR64 : Mips::JR; in buildProperJumpMI()
381 unsigned JIC = ABI.IsN64() ? Mips::JIC64 : Mips::JIC; in buildProperJumpMI()
382 unsigned JR_HB = ABI.IsN64() ? Mips::JR_HB64 : Mips::JR_HB; in buildProperJumpMI()
383 unsigned JR_HB_R6 = ABI.IsN64() ? Mips::JR_HB64_R6 : Mips::JR_HB_R6; in buildProperJumpMI()
391 if (JumpOp == Mips::JIC && STI->inMicroMipsMode()) in buildProperJumpMI()
392 JumpOp = Mips::JIC_MMR6; in buildProperJumpMI()
394 unsigned ATReg = ABI.IsN64() ? Mips::AT_64 : Mips::AT; in buildProperJumpMI()
430 ? STI->inMicroMipsMode() ? Mips::BALC_MMR6 : Mips::BALC in expandToLongBranch()
431 : STI->inMicroMipsMode() ? Mips::BAL_BR_MM : Mips::BAL_BR; in expandToLongBranch()
465 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
466 .addReg(Mips::SP) in expandToLongBranch()
468 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW)) in expandToLongBranch()
469 .addReg(Mips::RA) in expandToLongBranch()
470 .addReg(Mips::SP) in expandToLongBranch()
489 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT) in expandToLongBranch()
496 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_ADDiu), Mips::AT) in expandToLongBranch()
497 .addReg(Mips::AT) in expandToLongBranch()
511 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT) in expandToLongBranch()
512 .addReg(Mips::RA) in expandToLongBranch()
513 .addReg(Mips::AT); in expandToLongBranch()
514 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA) in expandToLongBranch()
515 .addReg(Mips::SP) in expandToLongBranch()
526 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
527 .addReg(Mips::SP) in expandToLongBranch()
532 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP)); in expandToLongBranch()
534 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
535 .addReg(Mips::SP) in expandToLongBranch()
588 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
589 .addReg(Mips::SP_64) in expandToLongBranch()
591 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD)) in expandToLongBranch()
592 .addReg(Mips::RA_64) in expandToLongBranch()
593 .addReg(Mips::SP_64) in expandToLongBranch()
595 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu), in expandToLongBranch()
596 Mips::AT_64) in expandToLongBranch()
597 .addReg(Mips::ZERO_64) in expandToLongBranch()
600 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
601 .addReg(Mips::AT_64) in expandToLongBranch()
607 BuildMI(*MFp, DL, TII->get(Mips::LONG_BRANCH_DADDiu), Mips::AT_64) in expandToLongBranch()
608 .addReg(Mips::AT_64) in expandToLongBranch()
622 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64) in expandToLongBranch()
623 .addReg(Mips::RA_64) in expandToLongBranch()
624 .addReg(Mips::AT_64); in expandToLongBranch()
625 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64) in expandToLongBranch()
626 .addReg(Mips::SP_64) in expandToLongBranch()
632 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu), in expandToLongBranch()
633 Mips::SP_64) in expandToLongBranch()
634 .addReg(Mips::SP_64) in expandToLongBranch()
637 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64) in expandToLongBranch()
638 .addReg(Mips::SP_64) in expandToLongBranch()
659 if (STI->hasMips32r6() && TII->isBranchOffsetInRange(Mips::BC, I.Offset)) { in expandToLongBranch()
666 TII->get(STI->inMicroMipsMode() ? Mips::BC_MMR6 : Mips::BC)) in expandToLongBranch()
676 .append(BuildMI(*MFp, DL, TII->get(Mips::J)).addMBB(TgtMBB)) in expandToLongBranch()
677 .append(BuildMI(*MFp, DL, TII->get(Mips::NOP))); in expandToLongBranch()
685 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64), in expandToLongBranch()
686 Mips::AT_64) in expandToLongBranch()
688 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
689 Mips::AT_64) in expandToLongBranch()
690 .addReg(Mips::AT_64) in expandToLongBranch()
692 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
693 .addReg(Mips::AT_64) in expandToLongBranch()
695 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
696 Mips::AT_64) in expandToLongBranch()
697 .addReg(Mips::AT_64) in expandToLongBranch()
699 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64) in expandToLongBranch()
700 .addReg(Mips::AT_64) in expandToLongBranch()
702 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op), in expandToLongBranch()
703 Mips::AT_64) in expandToLongBranch()
704 .addReg(Mips::AT_64) in expandToLongBranch()
707 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op), in expandToLongBranch()
708 Mips::AT) in expandToLongBranch()
710 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op), in expandToLongBranch()
711 Mips::AT) in expandToLongBranch()
712 .addReg(Mips::AT) in expandToLongBranch()
733 BuildMI(MBB, I, DL, TII->get(Mips::LUi), Mips::V0) in emitGPDisp()
735 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
736 .addReg(Mips::V0) in emitGPDisp()
738 MBB.removeLiveIn(Mips::V0); in emitGPDisp()
768 std::next(Iit)->getOpcode() != Mips::NOP) { in handleForbiddenSlot()
771 BuildMI(*MFp, I->getDebugLoc(), TII->get(Mips::NOP))); in handleForbiddenSlot()