Lines Matching refs:FirstOffset
4404 int64_t FirstOffset = IsLargeOffset ? 0 : OffsetValue; in expandUlh() local
4407 std::swap(FirstOffset, SecondOffset); in expandUlh()
4416 FirstOffset, IDLoc, STI); in expandUlh()
4454 int64_t FirstOffset = IsLargeOffset ? 1 : (OffsetValue + 1); in expandUsh() local
4457 std::swap(FirstOffset, SecondOffset); in expandUsh()
4460 TOut.emitRRI(Mips::SB, DstReg, ATReg, FirstOffset, IDLoc, STI); in expandUsh()
4467 TOut.emitRRI(Mips::SB, DstReg, SrcReg, FirstOffset, IDLoc, STI); in expandUsh()
5295 MCOperand &FirstOffset = Inst.getOperand(2); in expandLoadStoreDMacro() local
5296 signed NextOffset = FirstOffset.getImm() + 4; in expandLoadStoreDMacro()
5299 if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset)) in expandLoadStoreDMacro()
5305 TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI); in expandLoadStoreDMacro()
5309 TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI); in expandLoadStoreDMacro()
5342 MCOperand &FirstOffset = Inst.getOperand(2); in expandStoreDM1Macro() local
5343 signed NextOffset = FirstOffset.getImm() + 4; in expandStoreDM1Macro()
5346 if (!isInt<16>(FirstOffset.getImm()) || !isInt<16>(NextOffset)) in expandStoreDM1Macro()
5352 TOut.emitRRX(Opcode, FirstReg, BaseReg, FirstOffset, IDLoc, STI); in expandStoreDM1Macro()