Lines Matching refs:PR
197 PassRegistry &PR = *PassRegistry::getPassRegistry(); in LLVMInitializeHexagonTarget() local
198 initializeHexagonBitSimplifyPass(PR); in LLVMInitializeHexagonTarget()
199 initializeHexagonConstExtendersPass(PR); in LLVMInitializeHexagonTarget()
200 initializeHexagonConstPropagationPass(PR); in LLVMInitializeHexagonTarget()
201 initializeHexagonEarlyIfConversionPass(PR); in LLVMInitializeHexagonTarget()
202 initializeHexagonGenMuxPass(PR); in LLVMInitializeHexagonTarget()
203 initializeHexagonHardwareLoopsPass(PR); in LLVMInitializeHexagonTarget()
204 initializeHexagonLoopIdiomRecognizeLegacyPassPass(PR); in LLVMInitializeHexagonTarget()
205 initializeHexagonNewValueJumpPass(PR); in LLVMInitializeHexagonTarget()
206 initializeHexagonOptAddrModePass(PR); in LLVMInitializeHexagonTarget()
207 initializeHexagonPacketizerPass(PR); in LLVMInitializeHexagonTarget()
208 initializeHexagonRDFOptPass(PR); in LLVMInitializeHexagonTarget()
209 initializeHexagonSplitDoubleRegsPass(PR); in LLVMInitializeHexagonTarget()
210 initializeHexagonVectorCombineLegacyPass(PR); in LLVMInitializeHexagonTarget()
211 initializeHexagonVectorLoopCarriedReuseLegacyPassPass(PR); in LLVMInitializeHexagonTarget()
212 initializeHexagonVExtractPass(PR); in LLVMInitializeHexagonTarget()