Lines Matching refs:RegisterRef

211     static bool getSubregMask(const BitTracker::RegisterRef &RR,
218 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH,
227 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI);
228 static bool isTransparentCopy(const BitTracker::RegisterRef &RD,
229 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI);
407 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, in getSubregMask()
435 BitTracker::RegisterRef &SL, BitTracker::RegisterRef &SH, in parseRegSequence()
898 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { in getFinalVRegClass()
928 bool HexagonBitSimplify::isTransparentCopy(const BitTracker::RegisterRef &RD, in isTransparentCopy()
929 const BitTracker::RegisterRef &RS, MachineRegisterInfo &MRI) { in isTransparentCopy()
1067 bool usedBitsEqual(BitTracker::RegisterRef RD, BitTracker::RegisterRef RS);
1216 BitTracker::RegisterRef UR = *I; in computeUsedBits()
1261 BitTracker::RegisterRef RR = MI.getOperand(OpN); in computeUsedBits()
1278 bool RedundantInstrElimination::usedBitsEqual(BitTracker::RegisterRef RD, in usedBitsEqual()
1279 BitTracker::RegisterRef RS) { in usedBitsEqual()
1320 BitTracker::RegisterRef RD = MI->getOperand(0); in processBlock()
1330 BitTracker::RegisterRef RS = Op; in processBlock()
1514 bool findMatch(const BitTracker::RegisterRef &Inp,
1515 BitTracker::RegisterRef &Out, const RegisterSet &AVs);
1546 bool CopyGeneration::findMatch(const BitTracker::RegisterRef &Inp, in findMatch()
1547 BitTracker::RegisterRef &Out, const RegisterSet &AVs) { in findMatch()
1616 BitTracker::RegisterRef MR; in processBlock()
1623 BT.put(BitTracker::RegisterRef(NewR), BT.get(MR)); in processBlock()
1634 BitTracker::RegisterRef TL = { R, SubLo }; in processBlock()
1635 BitTracker::RegisterRef TH = { R, SubHi }; in processBlock()
1636 BitTracker::RegisterRef ML, MH; in processBlock()
1645 BT.put(BitTracker::RegisterRef(NewR), BT.get(R)); in processBlock()
1677 BitTracker::RegisterRef RD = MI.getOperand(0); in propagateRegCopy()
1684 BitTracker::RegisterRef RS = MI.getOperand(1); in propagateRegCopy()
1694 BitTracker::RegisterRef SL, SH; in propagateRegCopy()
1709 BitTracker::RegisterRef RH = MI.getOperand(1), RL = MI.getOperand(2); in propagateRegCopy()
1719 BitTracker::RegisterRef RS = MI.getOperand(SrcX); in propagateRegCopy()
1759 struct RegHalf : public BitTracker::RegisterRef {
1765 bool validateReg(BitTracker::RegisterRef R, unsigned Opc, unsigned OpNum);
1768 BitTracker::RegisterRef &Rs, BitTracker::RegisterRef &Rt);
1773 bool genPackhl(MachineInstr *MI, BitTracker::RegisterRef RD,
1775 bool genExtractHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1777 bool genCombineHalf(MachineInstr *MI, BitTracker::RegisterRef RD,
1779 bool genExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1781 bool genBitSplit(MachineInstr *MI, BitTracker::RegisterRef RD,
1783 bool simplifyTstbit(MachineInstr *MI, BitTracker::RegisterRef RD,
1785 bool simplifyExtractLow(MachineInstr *MI, BitTracker::RegisterRef RD,
1787 bool simplifyRCmp0(MachineInstr *MI, BitTracker::RegisterRef RD);
1884 bool BitSimplification::validateReg(BitTracker::RegisterRef R, unsigned Opc, in validateReg()
1894 const BitTracker::RegisterCell &RC, BitTracker::RegisterRef &Rs, in matchPackhl()
1895 BitTracker::RegisterRef &Rt) { in matchPackhl()
1930 BitTracker::RegisterRef RS = ValOp; in genStoreUpperHalf()
1975 BitTracker::RegisterRef RS = MI->getOperand(2); in genStoreImmediate()
2024 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genPackhl()
2028 BitTracker::RegisterRef Rs, Rt; in genPackhl()
2044 BT.put(BitTracker::RegisterRef(NewR), RC); in genPackhl()
2051 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractHalf()
2083 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractHalf()
2090 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genCombineHalf()
2115 BT.put(BitTracker::RegisterRef(NewR), RC); in genCombineHalf()
2122 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in genExtractLow()
2153 BitTracker::RegisterRef RS = Op; in genExtractLow()
2175 BT.put(BitTracker::RegisterRef(NewR), RC); in genExtractLow()
2182 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in genBitSplit()
2335 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC) { in simplifyTstbit()
2341 BitTracker::RegisterRef RS = MI->getOperand(1); in simplifyTstbit()
2358 BitTracker::RegisterRef RR(V.RefI.Reg, 0); in simplifyTstbit()
2395 BitTracker::RegisterRef RD, const BitTracker::RegisterCell &RC, in simplifyExtractLow()
2578 BT.put(BitTracker::RegisterRef(NewR), RC); in simplifyExtractLow()
2587 BitTracker::RegisterRef RD) { in simplifyRCmp0()
2607 BitTracker::RegisterRef SR = MI->getOperand(1); in simplifyRCmp0()
2633 BT.put(BitTracker::RegisterRef(NewR), NewRC); in simplifyRCmp0()
2699 BT.put(BitTracker::RegisterRef(NewR), NewRC); in simplifyRCmp0()
2736 BitTracker::RegisterRef RD = Op0; in processBlock()
2923 BitTracker::RegisterRef Inp, Out;
2930 BitTracker::RegisterRef LR, PR; // Loop Register, Preheader Register