Lines Matching refs:RefI
319 if (RC1[B1+i].Type == BitTracker::BitValue::Ref && RC1[B1+i].RefI.Reg == 0) in isEqual()
322 if (RC2[B2+i].Type == BitTracker::BitValue::Ref && RC2[B2+i].RefI.Reg == 0) in isEqual()
1822 Register Reg = RC[I].RefI.Reg; in matchHalf()
1823 unsigned P = RC[I].RefI.Pos; // The RefI.Pos will be advanced by I-B. in matchHalf()
1842 if (RV.RefI.Reg != Reg) in matchHalf()
1844 if (RV.RefI.Pos != i+Pos) in matchHalf()
2220 unsigned SrcR = B0.RefI.Reg; in genBitSplit()
2222 unsigned Pos = B0.RefI.Pos; in genBitSplit()
2229 if (V.RefI.Reg != SrcR || V.RefI.Pos != Pos+i) in genBitSplit()
2248 if (S0.Type != BitTracker::BitValue::Ref || S0.RefI.Reg != SrcR) in genBitSplit()
2250 unsigned P = S0.RefI.Pos; in genBitSplit()
2265 if (V.RefI.Reg != SrcR || V.RefI.Pos != P+I) in genBitSplit()
2352 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg != RS.Reg) { in simplifyTstbit()
2353 const TargetRegisterClass *TC = MRI.getRegClass(V.RefI.Reg); in simplifyTstbit()
2358 BitTracker::RegisterRef RR(V.RefI.Reg, 0); in simplifyTstbit()
2360 P = V.RefI.Pos; in simplifyTstbit()
2367 P = V.RefI.Pos; in simplifyTstbit()
2436 if (V.Type == BitTracker::BitValue::Ref && V.RefI.Reg == RD.Reg) in simplifyExtractLow()
2455 if (TopV.RefI.Reg == RD.Reg || TopV.RefI.Pos == W-1) in simplifyExtractLow()
3039 if (V.RefI.Reg != InpR) in isShuffleOf()
3061 if (V1.RefI.Pos != V2.RefI.Pos) in isSameShuffle()
3063 if (V1.RefI.Reg != InpR1) in isSameShuffle()
3065 if (V2.RefI.Reg == 0 || V2.RefI.Reg == OutR2) in isSameShuffle()
3068 MatchR = V2.RefI.Reg; in isSameShuffle()
3069 else if (V2.RefI.Reg != MatchR) in isSameShuffle()