360                                           Register FrameReg, int &Offset,  in rewriteFrameIndex()  argument
376     emitThumbRegPlusImmediate(MBB, II, dl, DestReg, FrameReg, Offset, TII,  in rewriteFrameIndex()
386     unsigned NumBits = (FrameReg == ARM::SP) ? 8 : 5;  in rewriteFrameIndex()
399       MI.getOperand(FrameRegIdx).ChangeToRegister(FrameReg, false);  in rewriteFrameIndex()
405       if (NewOpc != Opcode && FrameReg != ARM::SP)  in rewriteFrameIndex()
465   Register FrameReg;  in eliminateFrameIndex()  local
468   int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);  in eliminateFrameIndex()
475   if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){  in eliminateFrameIndex()
487     MI.getOperand(FIOperandNum).  ChangeToRegister(FrameReg, false /*isDef*/);  in eliminateFrameIndex()
495   if (rewriteFrameIndex(MI, FIOperandNum, FrameReg, Offset, TII))  in eliminateFrameIndex()
515       if (FrameReg == ARM::SP || STI.genExecuteOnly())  in eliminateFrameIndex()
516         emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg,  in eliminateFrameIndex()
523       emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,  in eliminateFrameIndex()
532       MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,  in eliminateFrameIndex()
539         if (FrameReg == ARM::SP || STI.genExecuteOnly())  in eliminateFrameIndex()
540           emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg,  in eliminateFrameIndex()
547         emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,  in eliminateFrameIndex()
554         MI.getOperand(FIOperandNum+1).ChangeToRegister(FrameReg, false, false,  in eliminateFrameIndex()