73   Register PredReg;  in ReplaceTailWithBranchTo()  local
74   ARMCC::CondCodes CC = getInstrPredicate(*Tail, PredReg);  in ReplaceTailWithBranchTo()
121   Register PredReg;  in isLegalToSplitMBBAt()  local
122   return getITInstrPredicate(*MBBI, PredReg) == ARMCC::AL;  in isLegalToSplitMBBAt()
279                                   ARMCC::CondCodes Pred, Register PredReg,  in emitT2RegPlusImmediate()  argument
285       .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
302         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
309         .addImm((unsigned)Pred).addReg(PredReg).setMIFlags(MIFlags);  in emitT2RegPlusImmediate()
318             .add(predOps(Pred, PredReg))  in emitT2RegPlusImmediate()
330             .add(predOps(Pred, PredReg))  in emitT2RegPlusImmediate()
539     Register PredReg;  in rewriteT2FrameIndex()  local
540     if (Offset == 0 && getInstrPredicate(MI, PredReg) == ARMCC::AL &&  in rewriteT2FrameIndex()
754                                            Register &PredReg) {  in getITInstrPredicate()  argument
758   return getInstrPredicate(MI, PredReg);  in getITInstrPredicate()
775                                             Register &PredReg) {  in getVPTInstrPredicate()  argument
778     PredReg = 0;  in getVPTInstrPredicate()
782   PredReg = MI.getOperand(PIdx+1).getReg();  in getVPTInstrPredicate()