Lines Matching refs:BaseReg
278 Register BaseReg, int NumBytes, in emitT2RegPlusImmediate() argument
282 if (NumBytes == 0 && DestReg != BaseReg) { in emitT2RegPlusImmediate()
284 .addReg(BaseReg, RegState::Kill) in emitT2RegPlusImmediate()
294 if (DestReg != ARM::SP && DestReg != BaseReg && in emitT2RegPlusImmediate()
316 .addReg(BaseReg) in emitT2RegPlusImmediate()
328 .addReg(BaseReg) in emitT2RegPlusImmediate()
341 if (DestReg == ARM::SP && BaseReg != ARM::SP) { in emitT2RegPlusImmediate()
344 .addReg(BaseReg) in emitT2RegPlusImmediate()
347 BaseReg = ARM::SP; in emitT2RegPlusImmediate()
351 assert((DestReg != ARM::SP || BaseReg == ARM::SP) && in emitT2RegPlusImmediate()
359 .addReg(BaseReg) in emitT2RegPlusImmediate()
394 .addReg(BaseReg, RegState::Kill) in emitT2RegPlusImmediate()
401 BaseReg = DestReg; in emitT2RegPlusImmediate()