915     struct MemoryOp Memory;  member
1108       if(!Memory.OffsetImm || Memory.OffsetRegNum) return false;  in isThumbMemPC()
1109       if(Memory.BaseRegNum != ARM::PC) return false;  in isThumbMemPC()
1110       if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in isThumbMemPC()
1362     if (Memory.BaseRegNum &&  in isMVEMem()
1363         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum) &&  in isMVEMem()
1364         !ARMMCRegisterClasses[ARM::MQPRRegClassID].contains(Memory.BaseRegNum))  in isMVEMem()
1366     if (Memory.OffsetRegNum &&  in isMVEMem()
1368             Memory.OffsetRegNum))  in isMVEMem()
1375     if (Memory.BaseRegNum &&  in isGPRMem()
1376         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.BaseRegNum))  in isGPRMem()
1378     if (Memory.OffsetRegNum &&  in isGPRMem()
1379         !ARMMCRegisterClasses[ARM::GPRRegClassID].contains(Memory.OffsetRegNum))  in isGPRMem()
1455     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffset()
1456      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffset()
1463             Memory.BaseRegNum))  in isMemNoOffsetT2()
1467     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT2()
1468      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT2()
1475             Memory.BaseRegNum))  in isMemNoOffsetT2NoSp()
1479     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT2NoSp()
1480      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT2NoSp()
1487             Memory.BaseRegNum))  in isMemNoOffsetT()
1491     return Memory.OffsetRegNum == 0 && Memory.OffsetImm == nullptr &&  in isMemNoOffsetT()
1492      (alignOK || Memory.Alignment == Alignment);  in isMemNoOffsetT()
1495     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemPCRelImm12()
1498     if (Memory.BaseRegNum != ARM::PC)  in isMemPCRelImm12()
1501     if (!Memory.OffsetImm) return true;  in isMemPCRelImm12()
1502     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemPCRelImm12()
1585     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode2()
1587     if (Memory.OffsetRegNum) return true;  in isAddrMode2()
1589     if (!Memory.OffsetImm) return true;  in isAddrMode2()
1590     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode2()
1613     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode3()
1615     if (Memory.ShiftType != ARM_AM::no_shift) return false;  in isAddrMode3()
1617     if (Memory.OffsetRegNum) return true;  in isAddrMode3()
1619     if (!Memory.OffsetImm) return true;  in isAddrMode3()
1620     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode3()
1650     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode5()
1652     if (Memory.OffsetRegNum) return false;  in isAddrMode5()
1654     if (!Memory.OffsetImm) return true;  in isAddrMode5()
1655     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode5()
1669     if (!isGPRMem() || Memory.Alignment != 0) return false;  in isAddrMode5FP16()
1671     if (Memory.OffsetRegNum) return false;  in isAddrMode5FP16()
1673     if (!Memory.OffsetImm) return true;  in isAddrMode5FP16()
1674     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isAddrMode5FP16()
1683     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemTBB()
1684         Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0)  in isMemTBB()
1690     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemTBH()
1691         Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm != 1 ||  in isMemTBH()
1692         Memory.Alignment != 0 )  in isMemTBH()
1698     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.Alignment != 0)  in isMemRegOffset()
1704     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isT2MemRegOffset()
1705         Memory.Alignment != 0 || Memory.BaseRegNum == ARM::PC)  in isT2MemRegOffset()
1708     if (Memory.ShiftType == ARM_AM::no_shift)  in isT2MemRegOffset()
1710     if (Memory.ShiftType != ARM_AM::lsl || Memory.ShiftImm > 3)  in isT2MemRegOffset()
1718     if (!isGPRMem() || !Memory.OffsetRegNum || Memory.isNegative ||  in isMemThumbRR()
1719         Memory.ShiftType != ARM_AM::no_shift || Memory.Alignment != 0)  in isMemThumbRR()
1721     return isARMLowRegister(Memory.BaseRegNum) &&  in isMemThumbRR()
1722       (!Memory.OffsetRegNum || isARMLowRegister(Memory.OffsetRegNum));  in isMemThumbRR()
1726     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs4()
1727         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs4()
1730     if (!Memory.OffsetImm) return true;  in isMemThumbRIs4()
1731     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs4()
1739     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs2()
1740         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs2()
1743     if (!Memory.OffsetImm) return true;  in isMemThumbRIs2()
1744     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs2()
1752     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbRIs1()
1753         !isARMLowRegister(Memory.BaseRegNum) || Memory.Alignment != 0)  in isMemThumbRIs1()
1756     if (!Memory.OffsetImm) return true;  in isMemThumbRIs1()
1757     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbRIs1()
1765     if (!isGPRMem() || Memory.OffsetRegNum != 0 ||  in isMemThumbSPI()
1766         Memory.BaseRegNum != ARM::SP || Memory.Alignment != 0)  in isMemThumbSPI()
1769     if (!Memory.OffsetImm) return true;  in isMemThumbSPI()
1770     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemThumbSPI()
1783     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm8s4Offset()
1786     if (!Memory.OffsetImm) return true;  in isMemImm8s4Offset()
1787     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm8s4Offset()
1802     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0 ||  in isMemImm7s4Offset()
1804             Memory.BaseRegNum))  in isMemImm7s4Offset()
1807     if (!Memory.OffsetImm) return true;  in isMemImm7s4Offset()
1808     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm7s4Offset()
1817     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm0_1020s4Offset()
1820     if (!Memory.OffsetImm) return true;  in isMemImm0_1020s4Offset()
1821     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm0_1020s4Offset()
1829     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm8Offset()
1832     if (Memory.BaseRegNum == ARM::PC) return false;  in isMemImm8Offset()
1834     if (!Memory.OffsetImm) return true;  in isMemImm8Offset()
1835     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm8Offset()
1845     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0 ||  in isMemImm7ShiftedOffset()
1846         !ARMMCRegisterClasses[RegClassID].contains(Memory.BaseRegNum))  in isMemImm7ShiftedOffset()
1852     if (!Memory.OffsetImm) return true;  in isMemImm7ShiftedOffset()
1853     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm7ShiftedOffset()
1875     if (!isMVEMem() || Memory.OffsetImm != 0 || Memory.Alignment != 0)  in isMemRegRQOffset()
1879             Memory.BaseRegNum))  in isMemRegRQOffset()
1882             Memory.OffsetRegNum))  in isMemRegRQOffset()
1885     if (shift == 0 && Memory.ShiftType != ARM_AM::no_shift)  in isMemRegRQOffset()
1889         (Memory.ShiftType != ARM_AM::uxtw || Memory.ShiftImm != shift))  in isMemRegRQOffset()
1896     if (!isMVEMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemRegQOffset()
1900             Memory.BaseRegNum))  in isMemRegQOffset()
1903     if (!Memory.OffsetImm)  in isMemRegQOffset()
1907     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemRegQOffset()
1924     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemPosImm8Offset()
1927     if (!Memory.OffsetImm) return true;  in isMemPosImm8Offset()
1928     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemPosImm8Offset()
1936     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemNegImm8Offset()
1939     if (Memory.BaseRegNum == ARM::PC) return false;  in isMemNegImm8Offset()
1941     if (!Memory.OffsetImm) return false;  in isMemNegImm8Offset()
1942     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemNegImm8Offset()
1951     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemUImm12Offset()
1954     if (!Memory.OffsetImm) return true;  in isMemUImm12Offset()
1955     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemUImm12Offset()
1970     if (!isGPRMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0)  in isMemImm12Offset()
1973     if (!Memory.OffsetImm) return true;  in isMemImm12Offset()
1974     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in isMemImm12Offset()
2827     assert(isa<MCConstantExpr>(Memory.OffsetImm) && "Unknown value type!");  in addThumbMemPCOperands()
2828     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addThumbMemPCOperands()
2831       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addThumbMemPCOperands()
2851     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetOperands()
2856     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetT2Operands()
2861     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetT2NoSpOperands()
2866     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemNoOffsetTOperands()
2871     if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemPCRelImm12Operands()
2874       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemPCRelImm12Operands()
2895     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAlignedMemoryOperands()
2896     Inst.addOperand(MCOperand::createImm(Memory.Alignment));  in addAlignedMemoryOperands()
2945     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode2Operands()
2946     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addAddrMode2Operands()
2947     if (!Memory.OffsetRegNum) {  in addAddrMode2Operands()
2948       if (!Memory.OffsetImm)  in addAddrMode2Operands()
2950       else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode2Operands()
2961         Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode2Operands()
2966           ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add,  in addAddrMode2Operands()
2967                             Memory.ShiftImm, Memory.ShiftType);  in addAddrMode2Operands()
2998     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode3Operands()
2999     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addAddrMode3Operands()
3000     if (!Memory.OffsetRegNum) {  in addAddrMode3Operands()
3001       if (!Memory.OffsetImm)  in addAddrMode3Operands()
3003       else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode3Operands()
3014         Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode3Operands()
3019           ARM_AM::getAM3Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add, 0);  in addAddrMode3Operands()
3057     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode5Operands()
3058     if (!Memory.OffsetImm)  in addAddrMode5Operands()
3060     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode5Operands()
3072       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode5Operands()
3086     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addAddrMode5FP16Operands()
3088     if (!Memory.OffsetImm)  in addAddrMode5FP16Operands()
3090     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm)) {  in addAddrMode5FP16Operands()
3101       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addAddrMode5FP16Operands()
3115     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm8s4OffsetOperands()
3116     addExpr(Inst, Memory.OffsetImm);  in addMemImm8s4OffsetOperands()
3130     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm7s4OffsetOperands()
3131     addExpr(Inst, Memory.OffsetImm);  in addMemImm7s4OffsetOperands()
3136     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm0_1020s4OffsetOperands()
3137     if (!Memory.OffsetImm)  in addMemImm0_1020s4OffsetOperands()
3139     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemImm0_1020s4OffsetOperands()
3143       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemImm0_1020s4OffsetOperands()
3148     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImmOffsetOperands()
3149     addExpr(Inst, Memory.OffsetImm);  in addMemImmOffsetOperands()
3154     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemRegRQOffsetOperands()
3155     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemRegRQOffsetOperands()
3168     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemUImm12OffsetOperands()
3169     addExpr(Inst, Memory.OffsetImm);  in addMemUImm12OffsetOperands()
3182     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemImm12OffsetOperands()
3183     addExpr(Inst, Memory.OffsetImm);  in addMemImm12OffsetOperands()
3195     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemTBBOperands()
3196     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemTBBOperands()
3201     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemTBHOperands()
3202     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemTBHOperands()
3208       ARM_AM::getAM2Opc(Memory.isNegative ? ARM_AM::sub : ARM_AM::add,  in addMemRegOffsetOperands()
3209                         Memory.ShiftImm, Memory.ShiftType);  in addMemRegOffsetOperands()
3210     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemRegOffsetOperands()
3211     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemRegOffsetOperands()
3217     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addT2MemRegOffsetOperands()
3218     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addT2MemRegOffsetOperands()
3219     Inst.addOperand(MCOperand::createImm(Memory.ShiftImm));  in addT2MemRegOffsetOperands()
3224     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRROperands()
3225     Inst.addOperand(MCOperand::createReg(Memory.OffsetRegNum));  in addMemThumbRROperands()
3230     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs4Operands()
3231     if (!Memory.OffsetImm)  in addMemThumbRIs4Operands()
3233     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbRIs4Operands()
3237       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbRIs4Operands()
3242     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs2Operands()
3243     if (!Memory.OffsetImm)  in addMemThumbRIs2Operands()
3245     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbRIs2Operands()
3248       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbRIs2Operands()
3253     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbRIs1Operands()
3254     addExpr(Inst, Memory.OffsetImm);  in addMemThumbRIs1Operands()
3259     Inst.addOperand(MCOperand::createReg(Memory.BaseRegNum));  in addMemThumbSPIOperands()
3260     if (!Memory.OffsetImm)  in addMemThumbSPIOperands()
3262     else if (const auto *CE = dyn_cast<MCConstantExpr>(Memory.OffsetImm))  in addMemThumbSPIOperands()
3266       Inst.addOperand(MCOperand::createExpr(Memory.OffsetImm));  in addMemThumbSPIOperands()
3807     Op->Memory.BaseRegNum = BaseRegNum;  in CreateMem()
3808     Op->Memory.OffsetImm = OffsetImm;  in CreateMem()
3809     Op->Memory.OffsetRegNum = OffsetRegNum;  in CreateMem()
3810     Op->Memory.ShiftType = ShiftType;  in CreateMem()
3811     Op->Memory.ShiftImm = ShiftImm;  in CreateMem()
3812     Op->Memory.Alignment = Alignment;  in CreateMem()
3813     Op->Memory.isNegative = isNegative;  in CreateMem()
3946     if (Memory.BaseRegNum)  in print()
3947       OS << " base:" << RegName(Memory.BaseRegNum);  in print()
3948     if (Memory.OffsetImm)  in print()
3949       OS << " offset-imm:" << *Memory.OffsetImm;  in print()
3950     if (Memory.OffsetRegNum)  in print()
3951       OS << " offset-reg:" << (Memory.isNegative ? "-" : "")  in print()
3952          << RegName(Memory.OffsetRegNum);  in print()
3953     if (Memory.ShiftType != ARM_AM::no_shift) {  in print()
3954       OS << " shift-type:" << ARM_AM::getShiftOpcStr(Memory.ShiftType);  in print()
3955       OS << " shift-imm:" << Memory.ShiftImm;  in print()
3957     if (Memory.Alignment)  in print()
3958       OS << " alignment:" << Memory.Alignment;  in print()