Lines Matching refs:ITState

291   } ITState;  member in __anon296d71d40111::ARMAsmParser
304 ITInst.addOperand(MCOperand::createImm(ITState.Cond)); in flushPendingInstructions()
305 ITInst.addOperand(MCOperand::createImm(ITState.Mask)); in flushPendingInstructions()
316 ITState.Mask = 0; in flushPendingInstructions()
317 ITState.CurPosition = ~0U; in flushPendingInstructions()
320 bool inITBlock() { return ITState.CurPosition != ~0U; } in inITBlock()
321 bool inExplicitITBlock() { return inITBlock() && ITState.IsExplicit; } in inExplicitITBlock()
322 bool inImplicitITBlock() { return inITBlock() && !ITState.IsExplicit; } in inImplicitITBlock()
325 return ITState.CurPosition == 4 - countTrailingZeros(ITState.Mask); in lastInITBlock()
333 unsigned TZ = countTrailingZeros(ITState.Mask); in forwardITPosition()
334 if (++ITState.CurPosition == 5 - TZ && ITState.IsExplicit) in forwardITPosition()
335 ITState.CurPosition = ~0U; // Done with the IT block after this. in forwardITPosition()
341 assert(ITState.CurPosition > 1); in rewindImplicitITPosition()
342 ITState.CurPosition--; in rewindImplicitITPosition()
343 unsigned TZ = countTrailingZeros(ITState.Mask); in rewindImplicitITPosition()
345 NewMask |= ITState.Mask & (0xC << TZ); in rewindImplicitITPosition()
347 ITState.Mask = NewMask; in rewindImplicitITPosition()
354 assert(ITState.CurPosition == 1); in discardImplicitITBlock()
355 ITState.CurPosition = ~0U; in discardImplicitITBlock()
365 unsigned MaskBit = extractITMaskBit(ITState.Mask, ITState.CurPosition); in currentITCond()
366 return MaskBit ? ARMCC::getOppositeCondition(ITState.Cond) : ITState.Cond; in currentITCond()
372 if (ITState.CurPosition == 1) { in invertCurrentITCondition()
373 ITState.Cond = ARMCC::getOppositeCondition(ITState.Cond); in invertCurrentITCondition()
375 ITState.Mask ^= 1 << (5 - ITState.CurPosition); in invertCurrentITCondition()
381 return inITBlock() && (ITState.Mask & 1); in isITBlockFull()
389 assert(Cond == ITState.Cond || in extendImplicitITBlock()
390 Cond == ARMCC::getOppositeCondition(ITState.Cond)); in extendImplicitITBlock()
391 unsigned TZ = countTrailingZeros(ITState.Mask); in extendImplicitITBlock()
394 NewMask |= ITState.Mask & (0xE << TZ); in extendImplicitITBlock()
396 NewMask |= (Cond != ITState.Cond) << TZ; in extendImplicitITBlock()
399 ITState.Mask = NewMask; in extendImplicitITBlock()
405 ITState.Cond = ARMCC::AL; in startImplicitITBlock()
406 ITState.Mask = 8; in startImplicitITBlock()
407 ITState.CurPosition = 1; in startImplicitITBlock()
408 ITState.IsExplicit = false; in startImplicitITBlock()
417 ITState.Cond = Cond; in startExplicitITBlock()
418 ITState.Mask = Mask; in startExplicitITBlock()
419 ITState.CurPosition = 0; in startExplicitITBlock()
420 ITState.IsExplicit = true; in startExplicitITBlock()
686 ITState.CurPosition = ~0U; in ARMAsmParser()
10844 extendImplicitITBlock(ITState.Cond); in MatchInstruction()
10902 ITState.Cond = in MatchInstruction()