1130   if (Subtarget->isThumb1Only() || !Subtarget->hasV6Ops()  in ARMTargetLowering()
1180   if (!Subtarget->hasV6Ops())  in ARMTargetLowering()
1342   if (!Subtarget->hasV6Ops()) {  in ARMTargetLowering()
1530   if (Subtarget->hasV6Ops())  in ARMTargetLowering()
1873   PrefAlign = (Subtarget->hasV6Ops() && !Subtarget->isMClass() ? 8 : 4);  in shouldAlignPointerArgs()
4144     assert(Subtarget->hasV6Ops() && !Subtarget->isThumb() &&  in LowerATOMIC_FENCE()
4959   if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())  in LowerADDSUBSAT()
5310   if ((!Subtarget->isThumb() && Subtarget->hasV6Ops()) || Subtarget->isThumb2())  in LowerSELECT_CC()
12579   if (Subtarget->hasV6Ops() && Subtarget->hasDSP() && Subtarget->useMulOps() &&  in AddCombineTo64bitMLAL()
12626   if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())  in AddCombineTo64bitUMAAL()
12674   if (!Subtarget->hasV6Ops() || !Subtarget->hasDSP())  in PerformUMLALCombine()
13746   if (!Subtarget->hasV6Ops() ||  in PerformORCombineToSMULWBT()
16539   if (N->getOpcode() == ISD::SRL && VT == MVT::i32 && ST->hasV6Ops()) {  in PerformShiftCombine()
19039   if (!Subtarget->hasV6Ops())  in ExpandInlineAsm()
19999     if (Subtarget->hasV6Ops() && !Subtarget->isThumb()) {  in makeDMB()