Lines Matching refs:getNode
2083 Val = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocVT.getSizeInBits()), in MoveToHPR()
2086 Val = DAG.getNode(ARMISD::VMOVhr, dl, ValVT, Val); in MoveToHPR()
2088 Val = DAG.getNode(ISD::TRUNCATE, dl, in MoveToHPR()
2090 Val = DAG.getNode(ISD::BITCAST, dl, ValVT, Val); in MoveToHPR()
2099 Val = DAG.getNode(ARMISD::VMOVrh, dl, in MoveFromHPR()
2102 Val = DAG.getNode(ISD::BITCAST, dl, in MoveFromHPR()
2104 Val = DAG.getNode(ISD::ZERO_EXTEND, dl, in MoveFromHPR()
2107 return DAG.getNode(ISD::BITCAST, dl, LocVT, Val); in MoveFromHPR()
2151 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2154 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
2155 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2168 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
2169 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
2183 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
2218 DstAddr = DAG.getNode(ISD::ADD, dl, getPointerTy(DAG.getDataLayout()), in computeAddrForCallArg()
2235 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
2244 if (!StackPtr.getNode()) in PassF64ArgInRegs()
2410 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2413 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2416 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
2419 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2443 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerCall()
2444 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerCall()
2445 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
2451 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2453 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
2506 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
2528 SDValue Src = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, SrcOffset); in LowerCall()
2536 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, in LowerCall()
2552 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOpChains); in LowerCall()
2594 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2608 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2623 Callee = DAG.getNode( in LowerCall()
2644 DAG.getNode(ARMISD::Wrapper, dl, PtrVt, Callee), in LowerCall()
2660 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
2665 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVt, Callee, PICLabel); in LowerCall()
2756 if (InFlag.getNode()) in LowerCall()
2762 SDValue Ret = DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, Ops); in LowerCall()
2763 DAG.addCallSiteInfo(Ret.getNode(), std::move(CSInfo)); in LowerCall()
2768 Chain = DAG.getNode(CallOpc, dl, NodeTys, Ops); in LowerCall()
2769 DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge); in LowerCall()
2771 DAG.addCallSiteInfo(Chain.getNode(), std::move(CSInfo)); in LowerCall()
2911 (!isa<GlobalAddressSDNode>(Callee.getNode()) || isIndirect)) in IsEligibleForTailCallOptimization()
3064 return DAG.getNode(ARMISD::INTRET_FLAG, DL, MVT::Other, RetOps); in LowerInterruptReturn()
3141 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3155 Arg = DAG.getNode(ISD::BITCAST, dl, MVT::getIntegerVT(LocBits), Arg); in LowerReturn()
3156 Arg = DAG.getNode(ISD::AND, dl, MVT::getIntegerVT(LocBits), Arg, Mask); in LowerReturn()
3157 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
3165 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3167 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3184 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
3189 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
3223 if (Flag.getNode()) in LowerReturn()
3241 return DAG.getNode(RetNode, dl, MVT::Other, RetOps); in LowerReturn()
3274 if (Copies.count(UseChain.getNode())) in isUsedByReturnOnly()
3339 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER()
3341 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, WriteValue, in LowerWRITE_REGISTER()
3344 return DAG.getNode(ISD::WRITE_REGISTER, DL, MVT::Other, Ops); in LowerWRITE_REGISTER()
3387 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
3414 CPAddr = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, CPAddr); in LowerBlockAddress()
3421 return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel); in LowerBlockAddress()
3486 DAG.getNode(ARMISD::CALL, DL, DAG.getVTList(MVT::Other, MVT::Glue), in LowerGlobalTLSAddressDarwin()
3509 SDValue CurrentTEB = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in LowerGlobalTLSAddressWindows()
3518 DAG.getNode(ISD::ADD, DL, PtrVT, TEB, DAG.getIntPtrConstant(0x2c, DL)); in LowerGlobalTLSAddressWindows()
3527 TLSIndex = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, TLSIndex); in LowerGlobalTLSAddressWindows()
3530 SDValue Slot = DAG.getNode(ISD::SHL, DL, PtrVT, TLSIndex, in LowerGlobalTLSAddressWindows()
3533 DAG.getNode(ISD::ADD, DL, PtrVT, TLSArray, Slot), in LowerGlobalTLSAddressWindows()
3541 DAG.getNode(ARMISD::Wrapper, DL, MVT::i32, in LowerGlobalTLSAddressWindows()
3545 return DAG.getNode(ISD::ADD, DL, PtrVT, TLS, Offset); in LowerGlobalTLSAddressWindows()
3562 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
3569 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
3600 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
3613 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3620 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
3631 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
3639 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
3780 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in promoteToConstantPool()
3822 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3831 SDValue Result = DAG.getNode(ARMISD::WrapperPIC, dl, PtrVT, G); in LowerGlobalAddressELF()
3839 RelAddr = DAG.getNode(ARMISD::Wrapper, dl, PtrVT, G); in LowerGlobalAddressELF()
3844 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3850 SDValue Result = DAG.getNode(ISD::ADD, dl, PtrVT, SB, RelAddr); in LowerGlobalAddressELF()
3860 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
3864 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
3888 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, G); in LowerGlobalAddressDarwin()
3919 Result = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, in LowerGlobalAddressWindows()
3932 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, in LowerEH_SJLJ_SETJMP()
3940 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
3947 return DAG.getNode(ARMISD::EH_SJLJ_SETUP_DISPATCH, dl, MVT::Other, in LowerEH_SJLJ_SETUP_DISPATCH()
4002 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
4008 DAG.getNode(ISD::SRA, dl, VTy, Operand, DAG.getConstant(31, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4009 SDValue XOR = DAG.getNode(ISD::XOR, dl, VTy, SRA, Operand); in LowerINTRINSIC_WO_CHAIN()
4011 DAG.getNode(ISD::SHL, dl, VTy, XOR, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4013 DAG.getNode(ISD::OR, dl, VTy, SHL, DAG.getConstant(1, dl, VTy)); in LowerINTRINSIC_WO_CHAIN()
4014 SDValue Result = DAG.getNode(ISD::CTLZ, dl, VTy, OR); in LowerINTRINSIC_WO_CHAIN()
4023 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN()
4025 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, VTy, Operand, in LowerINTRINSIC_WO_CHAIN()
4030 SDValue SRAHi = DAG.getNode(ISD::SRA, dl, VTy, Hi, Constant31); in LowerINTRINSIC_WO_CHAIN()
4031 SDValue XORHi = DAG.getNode(ISD::XOR, dl, VTy, SRAHi, Hi); in LowerINTRINSIC_WO_CHAIN()
4032 SDValue SHLHi = DAG.getNode(ISD::SHL, dl, VTy, XORHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4033 SDValue ORHi = DAG.getNode(ISD::OR, dl, VTy, SHLHi, Constant1); in LowerINTRINSIC_WO_CHAIN()
4034 SDValue CLSHi = DAG.getNode(ISD::CTLZ, dl, VTy, ORHi); in LowerINTRINSIC_WO_CHAIN()
4041 SDValue CLZAdjustedLo = DAG.getNode(ISD::CTLZ, dl, VTy, AdjustedLo); in LowerINTRINSIC_WO_CHAIN()
4044 DAG.getNode(ISD::ADD, dl, VTy, CLZAdjustedLo, Constant31), CLSHi); in LowerINTRINSIC_WO_CHAIN()
4059 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
4066 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
4071 return DAG.getNode(ISD::ABS, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4077 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4084 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4093 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4102 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4107 return DAG.getNode(NewOpc, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4111 return DAG.getNode(ARMISD::VTBL1, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4114 return DAG.getNode(ARMISD::VTBL2, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4118 return DAG.getNode(ARMISD::PREDICATE_CAST, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4121 return DAG.getNode(ARMISD::VECTOR_REG_CAST, SDLoc(Op), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
4124 return DAG.getNode(ARMISD::LSLL, SDLoc(Op), Op->getVTList(), in LowerINTRINSIC_WO_CHAIN()
4127 return DAG.getNode(ARMISD::ASRL, SDLoc(Op), Op->getVTList(), in LowerINTRINSIC_WO_CHAIN()
4146 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4164 return DAG.getNode(ISD::INTRINSIC_VOID, dl, MVT::Other, Op.getOperand(0), in LowerATOMIC_FENCE()
4191 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
4244 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
4300 FIN = DAG.getNode(ISD::ADD, dl, PtrVT, FIN, DAG.getConstant(4, dl, PtrVT)); in StoreByValRegs()
4304 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); in StoreByValRegs()
4338 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(ValueBits), Val); in splitValueIntoRegisterParts()
4339 Val = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::getIntegerVT(PartBits), Val); in splitValueIntoRegisterParts()
4340 Val = DAG.getNode(ISD::BITCAST, DL, PartVT, Val); in splitValueIntoRegisterParts()
4357 Val = DAG.getNode(ISD::BITCAST, DL, MVT::getIntegerVT(PartBits), Val); in joinRegisterPartsIntoValue()
4358 Val = DAG.getNode(ISD::TRUNCATE, DL, MVT::getIntegerVT(ValueBits), Val); in joinRegisterPartsIntoValue()
4359 Val = DAG.getNode(ISD::BITCAST, DL, ValueVT, Val); in joinRegisterPartsIntoValue()
4453 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
4454 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4456 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, ArgValue, in LowerFormalArguments()
4497 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4500 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
4502 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4505 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
4507 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
4600 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { in isFloatingPointZero()
4625 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp()
4695 auto *RHSC = cast<ConstantSDNode>(RHS.getNode()); in getARMCmp()
4701 LHS = DAG.getNode(ISD::SHL, dl, MVT::i32, LHS.getOperand(0), ShiftAmt); in getARMCmp()
4720 SDValue Shift = DAG.getNode(ARMISD::LSLS, dl, in getARMCmp()
4759 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
4769 Cmp = DAG.getNode(Signaling ? ARMISD::CMPFPE : ARMISD::CMPFP, in getVFPCmp()
4772 Cmp = DAG.getNode(Signaling ? ARMISD::CMPFPEw0 : ARMISD::CMPFPw0, in getVFPCmp()
4774 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
4784 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
4790 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
4793 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0)); in duplicateCmp()
4795 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
4822 Value = DAG.getNode(ISD::ADD, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4823 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4829 Value = DAG.getNode(ARMISD::ADDC, dl, in getARMXALUOOp()
4832 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value, LHS); in getARMXALUOOp()
4836 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4837 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4841 Value = DAG.getNode(ISD::SUB, dl, Op.getValueType(), LHS, RHS); in getARMXALUOOp()
4842 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, LHS, RHS); in getARMXALUOOp()
4847 Value = DAG.getNode(ISD::UMUL_LOHI, dl, in getARMXALUOOp()
4850 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4858 Value = DAG.getNode(ISD::SMUL_LOHI, dl, in getARMXALUOOp()
4861 OverflowCmp = DAG.getNode(ARMISD::CMP, dl, MVT::Glue, Value.getValue(1), in getARMXALUOOp()
4862 DAG.getNode(ISD::SRA, dl, Op.getValueType(), in getARMXALUOOp()
4888 SDValue Overflow = DAG.getNode(ARMISD::CMOV, dl, VT, TVal, FVal, in LowerSignedALUO()
4892 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerSignedALUO()
4902 SDValue Carry = DAG.getNode(ARMISD::SUBC, DL, in ConvertBooleanCarryToCarryFlag()
4914 return DAG.getNode(ARMISD::ADDE, DL, DAG.getVTList(VT, MVT::i32), in ConvertCarryFlagToBooleanCarry()
4937 Value = DAG.getNode(ARMISD::ADDC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
4942 Value = DAG.getNode(ARMISD::SUBC, dl, VTs, LHS, RHS); in LowerUnsignedALUO()
4947 Overflow = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerUnsignedALUO()
4953 return DAG.getNode(ISD::MERGE_VALUES, dl, VTs, Value, Overflow); in LowerUnsignedALUO()
5004 DAG.getNode(NewOpcode, dl, MVT::i32, in LowerADDSUBSAT()
5007 return DAG.getNode(ISD::TRUNCATE, dl, VT, Add); in LowerADDSUBSAT()
5058 if (True.getNode() && False.getNode()) { in LowerSELECT()
5071 Cond = DAG.getNode(ISD::AND, dl, Cond.getValueType(), Cond, in LowerSELECT()
5133 FalseVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5135 TrueVal = DAG.getNode(ARMISD::VMOVRRD, dl, in getCMOV()
5143 SDValue Low = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseLow, TrueLow, in getCMOV()
5145 SDValue High = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, FalseHigh, TrueHigh, in getCMOV()
5148 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Low, High); in getCMOV()
5150 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, in getCMOV()
5244 return DAG.getNode(ARMISD::SSAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5247 return DAG.getNode(ARMISD::USAT, dl, VT, V2Tmp, in LowerSaturatingConditional()
5324 SDValue ShiftV = DAG.getNode(ISD::SRA, dl, VT, SatValue, in LowerSELECT_CC()
5327 SDValue NotShiftV = DAG.getNode(ISD::XOR, dl, VT, ShiftV, in LowerSELECT_CC()
5329 return DAG.getNode(ISD::AND, dl, VT, SatValue, NotShiftV); in LowerSELECT_CC()
5331 return DAG.getNode(ISD::OR, dl, VT, SatValue, ShiftV); in LowerSELECT_CC()
5386 return DAG.getNode(Opcode, dl, VT, TrueVal, FalseVal, ARMcc, Cmp); in LowerSELECT_CC()
5396 if (!RHS.getNode()) { in LowerSELECT_CC()
5475 SDNode *N = Op.getNode(); in canChangeToInt()
5524 SDValue NewPtr = DAG.getNode(ISD::ADD, dl, in expandf64Toi32()
5562 LHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5564 RHS = DAG.getNode(ISD::AND, dl, MVT::i32, in OptimizeVFPBrcond()
5568 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
5576 LHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, LHS2, Mask); in OptimizeVFPBrcond()
5577 RHS2 = DAG.getNode(ISD::AND, dl, MVT::i32, RHS2, Mask); in OptimizeVFPBrcond()
5582 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops); in OptimizeVFPBrcond()
5618 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBRCOND()
5639 if (!RHS.getNode()) { in LowerBR_CC()
5672 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, Chain, Dest, ARMcc, CCR, in LowerBR_CC()
5680 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
5699 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5703 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops); in LowerBR_CC()
5717 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI); in LowerBR_JT()
5718 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, dl, PTy)); in LowerBR_JT()
5719 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Index); in LowerBR_JT()
5725 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
5733 Addr = DAG.getNode(ISD::ADD, dl, PTy, Table, Addr); in LowerBR_JT()
5734 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5740 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI); in LowerBR_JT()
5751 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
5769 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorFP_TO_INT()
5771 Op = DAG.getNode(Op.getOpcode(), dl, NewTy, Op.getOperand(0)); in LowerVectorFP_TO_INT()
5772 return DAG.getNode(ISD::TRUNCATE, dl, VT, Op); in LowerVectorFP_TO_INT()
5805 DAG.getNode(Op.getOpcode() == ISD::STRICT_FP_TO_SINT ? ISD::FP_TO_SINT in LowerFP_TO_INT()
5821 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
5839 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
5855 Op = DAG.getNode(CastOpc, dl, DestVecType, Op.getOperand(0)); in LowerVectorINT_TO_FP()
5856 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
5893 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
5897 Mask = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
5898 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
5901 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
5903 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
5905 Tmp1 = DAG.getNode(ARMISD::VSHLIMM, dl, OpVT, in LowerFCOPYSIGN()
5906 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
5909 Tmp1 = DAG.getNode(ARMISD::VSHRuIMM, dl, MVT::v1i64, in LowerFCOPYSIGN()
5910 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
5912 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
5913 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
5917 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
5918 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
5919 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
5921 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
5922 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
5923 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
5925 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
5926 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
5929 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
5937 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
5939 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
5944 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
5946 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
5947 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
5948 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
5949 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
5953 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
5956 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
5957 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
5958 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
5976 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
6026 SDValue Read = DAG.getNode(ISD::READ_REGISTER, DL, in ExpandREAD_REGISTER()
6031 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Read.getValue(0), in ExpandREAD_REGISTER()
6081 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
6082 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DstVT, BitCast, in CombineVMOVDRRCandidateWithVecOp()
6105 DAG.getNode(ISD::ZERO_EXTEND, SDLoc(N), MVT::i32, Op)); in ExpandBITCAST()
6109 return DAG.getNode( in ExpandBITCAST()
6123 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
6125 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
6127 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
6128 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
6136 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6138 DAG.getNode(ARMISD::VREV64, dl, SrcVT, Op)); in ExpandBITCAST()
6140 Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
6143 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
6160 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
6161 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
6181 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
6183 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
6184 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
6186 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
6187 SDValue LoSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
6188 SDValue LoBigShift = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
6191 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, LoBigShift, in LowerShiftRightParts()
6194 SDValue HiSmallShift = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
6196 ? DAG.getNode(Opc, dl, VT, ShOpHi, in LowerShiftRightParts()
6201 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftRightParts()
6223 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
6225 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
6226 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
6227 SDValue HiSmallShift = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
6229 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
6231 SDValue HiBigShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
6234 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, HiSmallShift, HiBigShift, in LowerShiftLeftParts()
6239 SDValue LoSmallShift = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
6240 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, LoSmallShift, in LowerShiftLeftParts()
6259 DAG.getNode(ISD::INTRINSIC_W_CHAIN, dl, {MVT::i32, MVT::Other}, Ops); in LowerFLT_ROUNDS_()
6261 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerFLT_ROUNDS_()
6263 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerFLT_ROUNDS_()
6265 SDValue And = DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerFLT_ROUNDS_()
6287 RMValue = DAG.getNode(ISD::SUB, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6289 RMValue = DAG.getNode(ISD::AND, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6291 RMValue = DAG.getNode(ISD::SHL, DL, MVT::i32, RMValue, in LowerSET_ROUNDING()
6298 DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, {MVT::i32, MVT::Other}, Ops); in LowerSET_ROUNDING()
6304 FPSCR = DAG.getNode(ISD::AND, DL, MVT::i32, FPSCR, in LowerSET_ROUNDING()
6306 FPSCR = DAG.getNode(ISD::OR, DL, MVT::i32, FPSCR, RMValue); in LowerSET_ROUNDING()
6309 return DAG.getNode(ISD::INTRINSIC_VOID, DL, MVT::Other, Ops2); in LowerSET_ROUNDING()
6320 SDValue NX = DAG.getNode(ISD::SUB, dl, VT, getZeroVector(VT, DAG, dl), X); in LowerCTTZ()
6321 SDValue LSB = DAG.getNode(ISD::AND, dl, VT, X, NX); in LowerCTTZ()
6327 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6329 SDValue Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6330 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6338 DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6340 SDValue CTLZ = DAG.getNode(ISD::CTLZ, dl, VT, LSB); in LowerCTTZ()
6341 return DAG.getNode(ISD::SUB, dl, VT, WidthMinus1, CTLZ); in LowerCTTZ()
6350 SDValue FF = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6352 Bits = DAG.getNode(ISD::ADD, dl, VT, LSB, FF); in LowerCTTZ()
6354 SDValue One = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerCTTZ()
6356 Bits = DAG.getNode(ISD::SUB, dl, VT, LSB, One); in LowerCTTZ()
6358 return DAG.getNode(ISD::CTPOP, dl, VT, Bits); in LowerCTTZ()
6364 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, VT, N->getOperand(0)); in LowerCTTZ()
6365 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
6381 Res = DAG.getNode(ISD::CTPOP, DL, VT8Bit, Res); in LowerCTPOP()
6395 Res = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, WidenVT, Ops); in LowerCTPOP()
6408 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); in getVShiftImm()
6471 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in LowerShift()
6473 return DAG.getNode(ARMISD::VSHLu, dl, VT, N->getOperand(0), in LowerShift()
6483 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in LowerShift()
6490 SDValue NegatedCount = DAG.getNode( in LowerShift()
6494 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), NegatedCount); in LowerShift()
6530 ShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in Expand64BitShift()
6539 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6542 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6546 Lo = DAG.getNode(ShPartsOpc, dl, DAG.getVTList(MVT::i32, MVT::i32), Lo, Hi, in Expand64BitShift()
6549 Hi = SDValue(Lo.getNode(), 1); in Expand64BitShift()
6550 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6562 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6564 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
6570 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), Hi); in Expand64BitShift()
6573 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
6576 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
6616 SDValue CastOp0 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op0); in LowerVSETCC()
6617 SDValue CastOp1 = DAG.getNode(ISD::BITCAST, dl, SplitVT, Op1); in LowerVSETCC()
6618 SDValue Cmp = DAG.getNode(ISD::SETCC, dl, SplitVT, CastOp0, CastOp1, in LowerVSETCC()
6620 SDValue Reversed = DAG.getNode(ARMISD::VREV64, dl, SplitVT, Cmp); in LowerVSETCC()
6621 SDValue Merged = DAG.getNode(ISD::AND, dl, SplitVT, Cmp, Reversed); in LowerVSETCC()
6622 Merged = DAG.getNode(ISD::BITCAST, dl, CmpVT, Merged); in LowerVSETCC()
6660 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6662 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6664 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6672 SDValue TmpOp0 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op1, Op0, in LowerVSETCC()
6674 SDValue TmpOp1 = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6676 SDValue Result = DAG.getNode(ISD::OR, dl, CmpVT, TmpOp0, TmpOp1); in LowerVSETCC()
6706 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
6708 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) in LowerVSETCC()
6712 if (AndOp.getNode() && AndOp.getOpcode() == ISD::BITCAST) in LowerVSETCC()
6715 if (AndOp.getNode() && AndOp.getOpcode() == ISD::AND) { in LowerVSETCC()
6716 Op0 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(0)); in LowerVSETCC()
6717 Op1 = DAG.getNode(ISD::BITCAST, dl, CmpVT, AndOp.getOperand(1)); in LowerVSETCC()
6718 SDValue Result = DAG.getNode(ARMISD::VTST, dl, CmpVT, Op0, Op1); in LowerVSETCC()
6732 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
6734 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) { in LowerVSETCC()
6743 if (SingleOp.getNode()) { in LowerVSETCC()
6744 Result = DAG.getNode(ARMISD::VCMPZ, dl, CmpVT, SingleOp, in LowerVSETCC()
6747 Result = DAG.getNode(ARMISD::VCMP, dl, CmpVT, Op0, Op1, in LowerVSETCC()
6770 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerSETCCCARRY()
6776 SDValue Cmp = DAG.getNode(ARMISD::SUBE, DL, VTs, LHS, RHS, Carry); in LowerSETCCCARRY()
6785 return DAG.getNode(ARMISD::CMOV, DL, Op.getValueType(), FVal, TVal, ARMcc, in LowerSETCCCARRY()
6963 return DAG.getNode(ARMISD::VMOVDRR, DL, MVT::f64, Lo, Hi); in LowerConstantFP()
6966 return DAG.getNode(ARMISD::VMOVSR, DL, VT, in LowerConstantFP()
6993 SDValue VecConstant = DAG.getNode(ARMISD::VMOVFPIMM, DL, MVT::v2f32, in LowerConstantFP()
6995 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecConstant, in LowerConstantFP()
7018 SDValue VecConstant = DAG.getNode(ARMISD::VMOVIMM, DL, VMovVT, in LowerConstantFP()
7021 return DAG.getNode(ISD::BITCAST, DL, MVT::f64, VecConstant); in LowerConstantFP()
7024 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
7026 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
7035 SDValue VecConstant = DAG.getNode(ARMISD::VMVNIMM, DL, VMovVT, NewVal); in LowerConstantFP()
7038 return DAG.getNode(ISD::BITCAST, DL, MVT::f64, VecConstant); in LowerConstantFP()
7041 SDValue VecFConstant = DAG.getNode(ISD::BITCAST, DL, MVT::v2f32, in LowerConstantFP()
7043 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, VecFConstant, in LowerConstantFP()
7482 SDValue N1 = DAG.getNode(ARMISD::VCVTN, dl, VT, DAG.getUNDEF(VT), Op0, in LowerBuildVectorOfFPTrunc()
7484 return DAG.getNode(ARMISD::VCVTN, dl, VT, N1, Op1, in LowerBuildVectorOfFPTrunc()
7528 return DAG.getNode(ARMISD::VCVTL, dl, VT, Op0, in LowerBuildVectorOfFPExt()
7582 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, FirstOp, in LowerBUILD_VECTOR_i1()
7584 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), Ext); in LowerBUILD_VECTOR_i1()
7599 SDValue Base = DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in LowerBUILD_VECTOR_i1()
7605 Base = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Base, V, in LowerBUILD_VECTOR_i1()
7641 return DAG.getNode(ARMISD::VIDUP, DL, DAG.getVTList(VT, MVT::i32), Op0, in LowerBUILD_VECTORToVIDUP()
7649 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR()
7674 if (Val.getNode()) { in LowerBUILD_VECTOR()
7675 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7676 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7684 if (Val.getNode()) { in LowerBUILD_VECTOR()
7685 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
7686 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
7694 return DAG.getNode(ARMISD::VMOVFPIMM, dl, VT, Val); in LowerBUILD_VECTOR()
7706 SDValue VDup = DAG.getNode(ARMISD::VDUP, dl, DupVT, Const); in LowerBUILD_VECTOR()
7707 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, VDup); in LowerBUILD_VECTOR()
7749 if (!Value.getNode() && !ValueCounts.empty()) in LowerBUILD_VECTOR()
7757 if (isOnlyLowElement && !ISD::isNormalLoad(Value.getNode())) in LowerBUILD_VECTOR()
7758 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
7783 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
7784 DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, DAG.getUNDEF(VT), in LowerBUILD_VECTOR()
7788 N = DAG.getNode(ARMISD::VDUPLANE, dl, VT, in LowerBUILD_VECTOR()
7791 N = DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
7803 N = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Ops); in LowerBUILD_VECTOR()
7814 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, IVT, in LowerBUILD_VECTOR()
7819 if (Val.getNode()) in LowerBUILD_VECTOR()
7820 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
7824 if (isConstant && Val.getNode()) in LowerBUILD_VECTOR()
7825 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
7864 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Lower, Upper); in LowerBUILD_VECTOR()
7877 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
7878 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
7879 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
7895 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, Vec, V, LaneIdx); in LowerBUILD_VECTOR()
8002 DAG.getNode(ISD::CONCAT_VECTORS, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8018 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8024 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8029 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8032 DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, DestVT, Src.ShuffleVec, in ReconstructShuffle()
8035 Src.ShuffleVec = DAG.getNode(ARMISD::VEXT, dl, DestVT, VEXTSrc1, in ReconstructShuffle()
8050 Src.ShuffleVec = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, ShuffleVT, Src.ShuffleVec); in ReconstructShuffle()
8102 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Shuffle); in ReconstructShuffle()
8215 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
8219 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
8222 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
8227 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
8232 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
8237 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8241 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8245 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
8263 if (V2.getNode()->isUndef()) in LowerVECTOR_SHUFFLEv8i8()
8264 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1, in LowerVECTOR_SHUFFLEv8i8()
8267 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2, in LowerVECTOR_SHUFFLEv8i8()
8279 OpLHS = DAG.getNode(ARMISD::VREV64, DL, VT, OpLHS); in LowerReverse_VECTOR_SHUFFLEv16i8_v8i16()
8284 return DAG.getNode(ARMISD::VEXT, DL, VT, OpLHS, OpLHS, in LowerReverse_VECTOR_SHUFFLEv16i8_v8i16()
8308 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllOnes); in PromoteMVEPredVector()
8312 AllZeroes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v16i8, AllZeroes); in PromoteMVEPredVector()
8323 RecastV1 = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Pred); in PromoteMVEPredVector()
8329 DAG.getNode(ISD::VSELECT, dl, MVT::v16i8, RecastV1, AllOnes, AllZeroes); in PromoteMVEPredVector()
8333 return DAG.getNode(ISD::BITCAST, dl, NewVT, PredAsVector); in PromoteMVEPredVector()
8339 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE_i1()
8348 SDValue cast = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, V1); in LowerVECTOR_SHUFFLE_i1()
8349 SDValue rbit = DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, cast); in LowerVECTOR_SHUFFLE_i1()
8350 SDValue srl = DAG.getNode(ISD::SRL, dl, MVT::i32, rbit, in LowerVECTOR_SHUFFLE_i1()
8352 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, srl); in LowerVECTOR_SHUFFLE_i1()
8372 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Shuffled, in LowerVECTOR_SHUFFLE_i1()
8430 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, BitCast, in LowerVECTOR_SHUFFLEUsingMovs()
8453 Parts[Part] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, in LowerVECTOR_SHUFFLEUsingMovs()
8458 SDValue NewVec = DAG.getNode(ARMISD::BUILD_VECTOR, dl, MVT::v4f32, Parts); in LowerVECTOR_SHUFFLEUsingMovs()
8505 SDValue Elt = DAG.getNode( in LowerVECTOR_SHUFFLEUsingOneOff()
8509 return DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VT, VInput, Elt, in LowerVECTOR_SHUFFLEUsingOneOff()
8519 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE()
8541 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8555 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
8557 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
8566 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8571 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8573 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8575 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
8578 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8594 return DAG.getNode(ShuffleOpc, dl, DAG.getVTList(VT, VT), V1, V2) in LowerVECTOR_SHUFFLE()
8600 return DAG.getNode(ARMISD::VMOVN, dl, VT, V2, V1, in LowerVECTOR_SHUFFLE()
8603 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
8606 return DAG.getNode(ARMISD::VMOVN, dl, VT, V1, V1, in LowerVECTOR_SHUFFLE()
8641 SDValue Res = DAG.getNode(ShuffleOpc, dl, DAG.getVTList(SubVT, SubVT), in LowerVECTOR_SHUFFLE()
8643 return DAG.getNode(ISD::CONCAT_VECTORS, dl, VT, Res.getValue(0), in LowerVECTOR_SHUFFLE()
8691 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8692 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
8698 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
8703 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
8704 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
8730 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerINSERT_VECTOR_ELT_i1()
8735 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, MVT::i32, in LowerINSERT_VECTOR_ELT_i1()
8737 SDValue BFI = DAG.getNode(ARMISD::BFI, dl, MVT::i32, Conv, Ext, in LowerINSERT_VECTOR_ELT_i1()
8739 return DAG.getNode(ARMISD::PREDICATE_CAST, dl, Op.getValueType(), BFI); in LowerINSERT_VECTOR_ELT_i1()
8774 SDValue IElt = DAG.getNode(ISD::BITCAST, dl, IEltVT, Elt); in LowerINSERT_VECTOR_ELT()
8775 SDValue IVecIn = DAG.getNode(ISD::BITCAST, dl, IVecVT, VecIn); in LowerINSERT_VECTOR_ELT()
8776 SDValue IVecOut = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, IVecVT, in LowerINSERT_VECTOR_ELT()
8778 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
8793 DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Op->getOperand(0)); in LowerEXTRACT_VECTOR_ELT_i1()
8797 SDValue Shift = DAG.getNode(ISD::SRL, dl, MVT::i32, Conv, in LowerEXTRACT_VECTOR_ELT_i1()
8817 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
8853 SDValue ConVec = DAG.getNode(ISD::UNDEF, dl, ConcatVT); in LowerCONCAT_VECTORS_i1()
8858 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV, in LowerCONCAT_VECTORS_i1()
8860 ConVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, ConcatVT, ConVec, Elt, in LowerCONCAT_VECTORS_i1()
8871 return DAG.getNode(ARMISD::VCMPZ, dl, VT, ConVec, in LowerCONCAT_VECTORS_i1()
8890 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
8891 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
8894 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
8895 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
8897 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
8923 SDValue SubVec = DAG.getNode(ISD::UNDEF, dl, SubVT); in LowerEXTRACT_SUBVECTOR()
8925 SDValue Elt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, NewV1, in LowerEXTRACT_SUBVECTOR()
8927 SubVec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubVT, SubVec, Elt, in LowerEXTRACT_SUBVECTOR()
8933 return DAG.getNode(ARMISD::VCMPZ, dl, VT, SubVec, in LowerEXTRACT_SUBVECTOR()
8949 DAG.getNode(ISD::AND, DL, FromVT, Op, DAG.getConstant(1, DL, FromVT)); in LowerTruncatei1()
8950 return DAG.getNode(ISD::SETCC, DL, VT, And, DAG.getConstant(0, DL, FromVT), in LowerTruncatei1()
9011 return DAG.getNode(ARMISD::MVETRUNC, DL, ToVT, Lo, Hi); in LowerTruncate()
9036 SDValue Ext = DAG.getNode(Opcode, DL, DAG.getVTList(ExtVT, ExtVT), Op); in LowerVectorExtend()
9040 Ext = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext); in LowerVectorExtend()
9041 Ext1 = DAG.getNode(N->getOpcode(), DL, MVT::v8i32, Ext1); in LowerVectorExtend()
9044 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Ext, Ext1); in LowerVectorExtend()
9055 SDNode *BVN = N->getOperand(0).getNode(); in isExtendedBUILD_VECTOR()
9082 SDNode *Elt = N->getOperand(i).getNode(); in isExtendedBUILD_VECTOR()
9156 return DAG.getNode(ExtOpcode, SDLoc(N), NewVT, N); in AddRequiredExtensionForVMULL()
9204 DAG.getNode(Opcode, SDLoc(newLoad), LD->getValueType(0), newLoad); in SkipExtensionForVMULL()
9213 SDNode *BVN = N->getOperand(0).getNode(); in SkipExtensionForVMULL()
9242 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt()
9243 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubSExt()
9253 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt()
9254 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubZExt()
9267 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL()
9268 SDNode *N1 = Op.getOperand(1).getNode(); in LowerMUL()
9315 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
9326 SDValue N00 = SkipExtensionForVMULL(N0->getOperand(0).getNode(), DAG); in LowerMUL()
9327 SDValue N01 = SkipExtensionForVMULL(N0->getOperand(1).getNode(), DAG); in LowerMUL()
9329 return DAG.getNode(N0->getOpcode(), DL, VT, in LowerMUL()
9330 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
9331 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
9332 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
9333 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
9343 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9344 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
9345 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9346 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
9349 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
9356 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
9357 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9359 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
9360 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
9362 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
9363 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
9375 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9376 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
9377 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9378 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
9383 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9386 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
9389 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
9394 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
9395 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9397 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
9398 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
9401 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
9402 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
9418 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
9419 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
9421 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9423 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9425 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
9427 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
9433 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
9436 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
9455 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
9456 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
9458 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9460 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9462 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
9464 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
9470 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
9473 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
9483 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
9484 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
9485 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
9486 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
9492 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9495 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9498 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9499 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
9502 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
9507 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
9508 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
9510 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
9511 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
9514 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
9515 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
9520 SDNode *N = Op.getNode(); in LowerADDSUBCARRY()
9534 Result = DAG.getNode(ARMISD::ADDE, DL, VTs, Op.getOperand(0), in LowerADDSUBCARRY()
9542 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerADDSUBCARRY()
9548 Result = DAG.getNode(ARMISD::SUBE, DL, VTs, Op.getOperand(0), in LowerADDSUBCARRY()
9555 Carry = DAG.getNode(ISD::SUB, DL, MVT::i32, in LowerADDSUBCARRY()
9560 return DAG.getNode(ISD::MERGE_VALUES, DL, N->getVTList(), Result, Carry); in LowerADDSUBCARRY()
9628 SDValue Add = DAG.getNode(ISD::ADD, dl, PtrVT, SRet, in LowerFSINCOS()
9634 return DAG.getNode(ISD::MERGE_VALUES, dl, Tys, in LowerFSINCOS()
9724 SDValue DBZCHK = DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, in LowerDIV_Windows()
9734 return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, Op); in WinDBZCheckDenominator()
9735 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator()
9737 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op, in WinDBZCheckDenominator()
9739 return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, in WinDBZCheckDenominator()
9740 DAG.getNode(ISD::OR, DL, MVT::i32, Lo, Hi)); in WinDBZCheckDenominator()
9753 SDValue DBZCHK = WinDBZCheckDenominator(DAG, Op.getNode(), DAG.getEntryNode()); in ExpandDIV_Windows()
9757 SDValue Lower = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Result); in ExpandDIV_Windows()
9758 SDValue Upper = DAG.getNode(ISD::SRL, dl, MVT::i64, Result, in ExpandDIV_Windows()
9760 Upper = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Upper); in ExpandDIV_Windows()
9762 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lower, Upper)); in ExpandDIV_Windows()
9766 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); in LowerPredicateLoad()
9792 Val = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateLoad()
9793 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, Load), in LowerPredicateLoad()
9795 SDValue Pred = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::v16i1, Val); in LowerPredicateLoad()
9797 Pred = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MemVT, Pred, in LowerPredicateLoad()
9816 SDValue Pair = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in LowerLOAD()
9822 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LowerPredicateStore()
9840 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, Build, in LowerPredicateStore()
9845 Build = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v16i1, Ops); in LowerPredicateStore()
9847 SDValue GRP = DAG.getNode(ARMISD::PREDICATE_CAST, dl, MVT::i32, Build); in LowerPredicateStore()
9849 GRP = DAG.getNode(ISD::SRL, dl, MVT::i32, in LowerPredicateStore()
9850 DAG.getNode(ISD::BITREVERSE, dl, MVT::i32, GRP), in LowerPredicateStore()
9860 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); in LowerSTORE()
9866 SDNode *N = Op.getNode(); in LowerSTORE()
9869 SDValue Lo = DAG.getNode( in LowerSTORE()
9873 SDValue Hi = DAG.getNode( in LowerSTORE()
9891 return (ISD::isBuildVectorAllZeros(N.getNode()) || in isZeroVector()
9897 MaskedLoadSDNode *N = cast<MaskedLoadSDNode>(Op.getNode()); in LowerMLOAD()
9908 SDValue ZeroVec = DAG.getNode(ARMISD::VMOVIMM, dl, VT, in LowerMLOAD()
9919 Combo = DAG.getNode(ISD::VSELECT, dl, VT, Mask, NewLoad, PassThru); in LowerMLOAD()
9956 SDValue Rev = DAG.getNode(RevOpcode, dl, VT, Op0); in LowerVecReduce()
9957 Op0 = DAG.getNode(BaseOpcode, dl, VT, Op0, Rev); in LowerVecReduce()
9964 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
9966 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
9968 SDValue Ext2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
9970 SDValue Ext3 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
9972 SDValue Res0 = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
9973 SDValue Res1 = DAG.getNode(BaseOpcode, dl, EltVT, Ext2, Ext3, Op->getFlags()); in LowerVecReduce()
9974 Res = DAG.getNode(BaseOpcode, dl, EltVT, Res0, Res1, Op->getFlags()); in LowerVecReduce()
9976 SDValue Ext0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
9978 SDValue Ext1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, Op0, in LowerVecReduce()
9980 Res = DAG.getNode(BaseOpcode, dl, EltVT, Ext0, Ext1, Op->getFlags()); in LowerVecReduce()
9985 Res = DAG.getNode(ISD::ANY_EXTEND, dl, Op->getValueType(0), Res); in LowerVecReduce()
10022 SDValue Cycles32 = DAG.getNode(ISD::INTRINSIC_W_CHAIN, DL, in ReplaceREADCYCLECOUNTER()
10024 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, DL, MVT::i64, Cycles32, in ReplaceREADCYCLECOUNTER()
10030 SDLoc dl(V.getNode()); in createGPRPairNode()
10033 DAG.getNode(ISD::SRL, dl, MVT::i64, V, DAG.getConstant(32, dl, MVT::i32)), in createGPRPairNode()
10071 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, SDLoc(N), MVT::i64, Lo, Hi)); in ReplaceCMP_SWAP_64Results()
10089 if (!RHS.getNode()) { in LowerFSETCC()
10093 SDValue Result = DAG.getNode(ISD::SETCC, dl, VT, LHS, RHS, in LowerFSETCC()
10152 case ISD::BITCAST: return ExpandBITCAST(Op.getNode(), DAG, Subtarget); in LowerOperation()
10155 case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget); in LowerOperation()
10156 case ISD::SREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
10157 case ISD::UREM: return LowerREM(Op.getNode(), DAG); in LowerOperation()
10162 case ISD::CTTZ_ZERO_UNDEF: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
10163 case ISD::CTPOP: return LowerCTPOP(Op.getNode(), DAG, Subtarget); in LowerOperation()
10173 case ISD::TRUNCATE: return LowerTruncate(Op.getNode(), DAG, Subtarget); in LowerOperation()
10175 case ISD::ZERO_EXTEND: return LowerVectorExtend(Op.getNode(), DAG, Subtarget); in LowerOperation()
10251 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
10254 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, in ReplaceLongIntrinsic()
10258 SDValue LongMul = DAG.getNode(Opc, dl, in ReplaceLongIntrinsic()
10262 Results.push_back(DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in ReplaceLongIntrinsic()
10330 if (Res.getNode()) in ReplaceNodeResults()
12146 if (!isConditionalZeroOrAllOnes(Slct.getNode(), AllOnes, CCOp, SwapSelectOps, in combineSelectAndUse()
12152 SDValue FalseVal = DAG.getNode(N->getOpcode(), SDLoc(N), VT, in combineSelectAndUse()
12158 return DAG.getNode(ISD::SELECT, SDLoc(N), VT, in combineSelectAndUse()
12168 if (N0.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
12171 if (N1.getNode()->hasOneUse()) in combineSelectAndUseCommutative()
12193 if (!IsVUZPShuffleNode(N0.getNode()) || N0.getNode() != N1.getNode() || in AddCombineToVPADD()
12205 SDNode *Unzip = N0.getNode(); in AddCombineToVPADD()
12214 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineToVPADD()
12231 if (!IsVUZPShuffleNode(N00.getNode()) || N00.getNode() != N10.getNode() || in AddCombineVUZPToVPADDL()
12259 SDValue Concat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), ConcatVT, in AddCombineVUZPToVPADDL()
12263 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, Ops); in AddCombineVUZPToVPADDL()
12295 SDNode *V = Vec.getNode(); in AddCombineBUILD_VECTORToVPADDL()
12309 if (V != ExtVec0->getOperand(0).getNode() || in AddCombineBUILD_VECTORToVPADDL()
12310 V != ExtVec1->getOperand(0).getNode()) in AddCombineBUILD_VECTORToVPADDL()
12362 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, widenType, Ops); in AddCombineBUILD_VECTORToVPADDL()
12364 return DAG.getNode(ExtOp, dl, VT, tmp); in AddCombineBUILD_VECTORToVPADDL()
12437 SDValue SMLAL = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in AddCombineTo64BitSMLAL16()
12440 SDValue HiMLALResult(SMLAL.getNode(), 1); in AddCombineTo64BitSMLAL16()
12441 SDValue LoMLALResult(SMLAL.getNode(), 0); in AddCombineTo64BitSMLAL16()
12483 SDNode *AddcSubcNode = AddeSubeNode->getOperand(2).getNode(); in AddCombineTo64bitMLAL()
12494 if (AddcSubcOp0.getNode() == AddcSubcOp1.getNode()) in AddCombineTo64bitMLAL()
12515 if (AddeSubeOp0.getNode() == AddeSubeOp1.getNode()) in AddCombineTo64bitMLAL()
12563 if (AddcSubcNode == HiAddSub->getNode() || in AddCombineTo64bitMLAL()
12564 AddcSubcNode->isPredecessorOf(HiAddSub->getNode())) in AddCombineTo64bitMLAL()
12581 LowAddSub->getNode()->getOpcode() == ISD::Constant && in AddCombineTo64bitMLAL()
12582 static_cast<ConstantSDNode *>(LowAddSub->getNode())->getZExtValue() == in AddCombineTo64bitMLAL()
12590 SDValue NewNode = DAG.getNode(FinalOpc, SDLoc(AddcSubcNode), MVT::i32, Ops); in AddCombineTo64bitMLAL()
12603 SDValue MLALNode = DAG.getNode(FinalOpc, SDLoc(AddcSubcNode), in AddCombineTo64bitMLAL()
12607 SDValue HiMLALResult(MLALNode.getNode(), 1); in AddCombineTo64bitMLAL()
12610 SDValue LoMLALResult(MLALNode.getNode(), 0); in AddCombineTo64bitMLAL()
12630 SDNode* AddcNode = AddeNode->getOperand(2).getNode(); in AddCombineTo64bitUMAAL()
12638 UmlalNode = AddcNode->getOperand(0).getNode(); in AddCombineTo64bitUMAAL()
12641 UmlalNode = AddcNode->getOperand(1).getNode(); in AddCombineTo64bitUMAAL()
12653 AddeNode->getOperand(1).getNode() == UmlalNode) || in AddCombineTo64bitUMAAL()
12654 (AddeNode->getOperand(0).getNode() == UmlalNode && in AddCombineTo64bitUMAAL()
12659 SDValue UMAAL = DAG.getNode(ARMISD::UMAAL, SDLoc(AddcNode), in AddCombineTo64bitUMAAL()
12663 DAG.ReplaceAllUsesOfValueWith(SDValue(AddeNode, 0), SDValue(UMAAL.getNode(), 1)); in AddCombineTo64bitUMAAL()
12664 DAG.ReplaceAllUsesOfValueWith(SDValue(AddcNode, 0), SDValue(UMAAL.getNode(), 0)); in AddCombineTo64bitUMAAL()
12679 SDNode* AddcNode = N->getOperand(2).getNode(); in PerformUMLALCombine()
12680 SDNode* AddeNode = N->getOperand(3).getNode(); in PerformUMLALCombine()
12685 (AddeNode->getOperand(2).getNode() == AddcNode)) in PerformUMLALCombine()
12686 return DAG.getNode(ARMISD::UMAAL, SDLoc(N), in PerformUMLALCombine()
12719 return DAG.getNode(Opcode, DL, N->getVTList(), N->getOperand(0), RHS); in PerformAddcSubcCombine()
12745 return DAG.getNode(Opcode, DL, N->getVTList(), in PerformAddeSubeCombine()
12847 LHS = DCI.DAG.getNode(ISD::ANY_EXTEND, dl, MVT::i32, LHS); in PerformSELECTCombine()
12851 DCI.DAG.getNode(Opcode, dl, MVT::i32, LHS, RHS->getOperand(0)); in PerformSELECTCombine()
12855 Reduction = DCI.DAG.getNode(ISD::TRUNCATE, dl, VectorScalarType, Reduction); in PerformSELECTCombine()
12942 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext0.getOperand(0)); in PerformVQDMULHCombine()
12944 DAG.getNode(ISD::ANY_EXTEND, DL, ExtVecVT, Ext1.getOperand(0)); in PerformVQDMULHCombine()
12945 Inp0 = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, LegalVecVT, Inp0); in PerformVQDMULHCombine()
12946 Inp1 = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, LegalVecVT, Inp1); in PerformVQDMULHCombine()
12947 SDValue VQDMULH = DAG.getNode(ARMISD::VQDMULH, DL, LegalVecVT, Inp0, Inp1); in PerformVQDMULHCombine()
12948 SDValue Trunc = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, ExtVecVT, VQDMULH); in PerformVQDMULHCombine()
12949 Trunc = DAG.getNode(ISD::TRUNCATE, DL, VecVT, Trunc); in PerformVQDMULHCombine()
12950 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, Trunc); in PerformVQDMULHCombine()
12959 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext0.getOperand(0), in PerformVQDMULHCombine()
12962 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, LegalVecVT, Ext1.getOperand(0), in PerformVQDMULHCombine()
12964 SDValue VQDMULH = DAG.getNode(ARMISD::VQDMULH, DL, LegalVecVT, Inp0, Inp1); in PerformVQDMULHCombine()
12967 return DAG.getNode(ISD::SIGN_EXTEND, DL, VT, in PerformVQDMULHCombine()
12968 DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Parts)); in PerformVQDMULHCombine()
13007 return DCI.DAG.getNode(ISD::VSELECT, SDLoc(N), Type, Cond, RHS, LHS); in PerformVSELECTCombine()
13061 if (N0.getNode()->hasOneUse()) in PerformADDCombineWithOperands()
13090 NB->getOperand(1) != SDValue(VecRed.getNode(), 1)) in PerformADDVecReduce()
13096 SDValue Inp = DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, in PerformADDVecReduce()
13098 NA = DAG.getNode(ISD::ADD, dl, MVT::i64, Inp, NA); in PerformADDVecReduce()
13102 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, NA, in PerformADDVecReduce()
13104 Ops.push_back(DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, NA, in PerformADDVecReduce()
13110 DAG.getNode(OpcodeA, dl, DAG.getVTList({MVT::i32, MVT::i32}), Ops); in PerformADDVecReduce()
13111 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Red, in PerformADDVecReduce()
13112 SDValue(Red.getNode(), 1)); in PerformADDVecReduce()
13297 SDValue BinOp = DAG.getNode(N->getOpcode(), dl, MVT::i32, X, in PerformSHLSimplify()
13300 SDValue Res = DAG.getNode(ISD::SHL, dl, MVT::i32, BinOp, SHL.getOperand(1)); in PerformSHLSimplify()
13345 return DAG.getNode(ARMISD::CSINV, SDLoc(N), MVT::i32, in PerformSubCSINCCombine()
13346 DAG.getNode(ISD::SUB, SDLoc(N), MVT::i32, N->getOperand(0), in PerformSubCSINCCombine()
13361 if (N1.getNode()->hasOneUse()) in PerformSUBCombine()
13386 SDValue Negate = DCI.DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformSUBCombine()
13389 return DCI.DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), Negate); in PerformSUBCombine()
13433 return DAG.getNode(Opcode, DL, VT, in PerformVMULCombine()
13434 DAG.getNode(ISD::MUL, DL, VT, N00, N1), in PerformVMULCombine()
13435 DAG.getNode(ISD::MUL, DL, VT, N01, N1)); in PerformVMULCombine()
13487 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
13488 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
13489 return DAG.getNode(ARMISD::VMULLs, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
13494 SDValue New0a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op0); in PerformMVEVMULLCombine()
13495 SDValue New1a = DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v4i32, Op1); in PerformMVEVMULLCombine()
13496 return DAG.getNode(ARMISD::VMULLu, dl, VT, New0a, New1a); in PerformMVEVMULLCombine()
13540 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
13542 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
13548 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
13549 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
13560 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
13562 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
13568 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
13570 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
13574 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
13581 Res = DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
13608 SDNode *N0 = N->getOperand(0).getNode(); in CombineANDShift()
13643 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
13645 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL, in CombineANDShift()
13654 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
13656 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL, in CombineANDShift()
13667 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
13669 return DAG.getNode(ISD::SRL, DL, MVT::i32, SHL, in CombineANDShift()
13680 SDValue SHL = DAG.getNode(ISD::SRL, DL, MVT::i32, N0->getOperand(0), in CombineANDShift()
13682 return DAG.getNode(ISD::SHL, DL, MVT::i32, SHL, in CombineANDShift()
13717 if (Val.getNode()) { in PerformANDCombine()
13719 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
13720 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
13721 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
13763 if ((SRL.getOperand(0).getNode() != SHL.getOperand(0).getNode()) || in PerformORCombineToSMULWBT()
13767 SDNode *SMULLOHI = SRL.getOperand(0).getNode(); in PerformORCombineToSMULWBT()
13798 SDValue Res = DAG.getNode(Opcode, dl, MVT::i32, OpS32, OpS16); in PerformORCombineToSMULWBT()
13851 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, in PerformORCombineToBFI()
13878 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0), in PerformORCombineToBFI()
13880 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res, in PerformORCombineToBFI()
13895 Res = DAG.getNode(ISD::SRL, DL, VT, N00, in PerformORCombineToBFI()
13897 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res, in PerformORCombineToBFI()
13917 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0), in PerformORCombineToBFI()
13981 SDValue And = DAG.getNode(ISD::AND, DL, VT, NewN0, NewN1); in PerformORCombine_i1()
14013 if (Val.getNode()) { in PerformORCombine()
14015 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
14016 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
14017 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
14063 SDValue Result = DAG.getNode(ARMISD::VBSP, dl, CanonicalVT, in PerformORCombine()
14067 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
14109 if (TLI->isConstTrueVal(N1.getNode()) && in PerformXORCombine()
14120 return DAG.getNode(N0->getOpcode(), DL, N0->getValueType(0), Ops); in PerformXORCombine()
14171 SDValue NewFrom = ParseBFI(V.getNode(), NewToMask, NewFromMask); in FindBFIToCombineWith()
14210 return DAG.getNode(ARMISD::BFI, SDLoc(N), N->getValueType(0), in PerformBFICombine()
14222 SDValue From2 = ParseBFI(CombineBFI.getNode(), ToMask2, FromMask2); in PerformBFICombine()
14234 From1 = DAG.getNode( in PerformBFICombine()
14237 return DAG.getNode(ARMISD::BFI, dl, VT, CombineBFI.getOperand(0), From1, in PerformBFICombine()
14255 SDValue BFI1 = DAG.getNode(ARMISD::BFI, dl, VT, N0.getOperand(0), in PerformBFICombine()
14257 return DAG.getNode(ARMISD::BFI, dl, VT, BFI1, N0.getOperand(1), in PerformBFICombine()
14275 SDNode *InNode = InDouble.getNode(); in PerformVMOVRRDCombine()
14290 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformVMOVRRDCombine()
14367 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
14369 return DAG.getNode(ISD::BITCAST, SDLoc(N), in PerformVMOVDRRCombine()
14394 DCI.DAG.getNode(ISD::CopyFromReg, SDLoc(N), N->getValueType(0), Ops); in PerformVMOVhrCombine()
14432 if (ISD::isNormalLoad(N0.getNode()) && N0.hasOneUse()) { in PerformVMOVrhCombine()
14446 return DAG.getNode(ARMISD::VGETLANEu, SDLoc(N), VT, N0->getOperand(0), in PerformVMOVrhCombine()
14459 SDNode *Elt = N->getOperand(i).getNode(); in hasNormalLoadOperand()
14489 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
14492 DCI.AddToWorklist(V.getNode()); in PerformBUILD_VECTORCombine()
14496 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
14578 V = DAG.getNode(ISD::BITCAST, SDLoc(V), MVT::i32, V); in PerformARMBUILD_VECTORCombine()
14580 DCI.AddToWorklist(V.getNode()); in PerformARMBUILD_VECTORCombine()
14583 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
14585 Vec = DAG.getNode(ISD::BITCAST, dl, VT, Vec); in PerformARMBUILD_VECTORCombine()
14587 DCI.AddToWorklist(Vec.getNode()); in PerformARMBUILD_VECTORCombine()
14602 return DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
14609 DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, Op->getOperand(0)); in PerformPREDICATE_CASTCombine()
14610 SDValue C = DCI.DAG.getNode(ARMISD::PREDICATE_CAST, dl, VT, in PerformPREDICATE_CASTCombine()
14612 return DCI.DAG.getNode(ISD::XOR, dl, VT, X, C); in PerformPREDICATE_CASTCombine()
14633 return DAG.getNode(ISD::BITCAST, dl, VT, Op); in PerformVECTOR_REG_CASTCombine()
14644 return DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, VT, Op->getOperand(0)); in PerformVECTOR_REG_CASTCombine()
14664 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op0, N->getOperand(2)); in PerformVCMPCombine()
14670 return DAG.getNode(ARMISD::VCMPZ, dl, VT, Op1, in PerformVCMPCombine()
14674 return DAG.getNode(ARMISD::VCMP, dl, VT, Op1, Op0, in PerformVCMPCombine()
14688 SDNode *Elt = N->getOperand(1).getNode(); in PerformInsertEltCombine()
14697 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
14698 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
14700 DCI.AddToWorklist(Vec.getNode()); in PerformInsertEltCombine()
14701 DCI.AddToWorklist(V.getNode()); in PerformInsertEltCombine()
14702 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
14704 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
14760 SDValue F64 = DCI.DAG.getNode( in PerformExtractEltToVMOVRRD()
14762 DCI.DAG.getNode(ARMISD::VECTOR_REG_CAST, dl, MVT::v2f64, Op0), in PerformExtractEltToVMOVRRD()
14765 DCI.DAG.getNode(ARMISD::VMOVRRD, dl, {MVT::i32, MVT::i32}, F64); in PerformExtractEltToVMOVRRD()
14767 DCI.CombineTo(OtherExt.getNode(), SDValue(VMOVRRD.getNode(), 1)); in PerformExtractEltToVMOVRRD()
14782 return DCI.DAG.getNode(ARMISD::VMOVhr, dl, VT, X); in PerformExtractEltCombine()
14784 return DCI.DAG.getNode(ARMISD::VMOVrh, dl, VT, X); in PerformExtractEltCombine()
14786 return DCI.DAG.getNode(ISD::BITCAST, dl, VT, X); in PerformExtractEltCombine()
14825 return DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, Op0.getOperand(Vec), in PerformExtractEltCombine()
14840 return DAG.getNode(ARMISD::VGETLANEs, SDLoc(N), VT, Op.getOperand(0), in PerformSignExtendInregCombine()
14883 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), in FlattenVectorShuffle()
14897 return DAG.getNode( in PerformShuffleVMOVNCombine()
14899 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(0)), in PerformShuffleVMOVNCombine()
14900 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(1)), in PerformShuffleVMOVNCombine()
14903 return DAG.getNode( in PerformShuffleVMOVNCombine()
14905 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(1)), in PerformShuffleVMOVNCombine()
14906 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, Trunc.getOperand(0)), in PerformShuffleVMOVNCombine()
14948 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, SDLoc(N), VT, in PerformVECTOR_SHUFFLECombine()
14985 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in CombineBaseUpdate()
14986 UE = Addr.getNode()->use_end(); UI != UE; ++UI) { in CombineBaseUpdate()
14997 Visited.insert(Addr.getNode()); in CombineBaseUpdate()
15099 ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode()); in CombineBaseUpdate()
15182 StVal = DAG.getNode(ISD::BITCAST, dl, AlignedVecTy, StVal); in CombineBaseUpdate()
15192 NewResults.push_back(SDValue(UpdN.getNode(), i)); in CombineBaseUpdate()
15198 LdVal = DAG.getNode(ISD::BITCAST, dl, VecTy, LdVal); in CombineBaseUpdate()
15201 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs+1)); // chain in CombineBaseUpdate()
15203 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in CombineBaseUpdate()
15239 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in PerformMVEVLDCombine()
15240 UE = Addr.getNode()->use_end(); in PerformMVEVLDCombine()
15252 Visited.insert(Addr.getNode()); in PerformMVEVLDCombine()
15298 ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode()); in PerformMVEVLDCombine()
15328 NewResults.push_back(SDValue(UpdN.getNode(), i)); in PerformMVEVLDCombine()
15330 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs + 1)); // chain in PerformMVEVLDCombine()
15332 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in PerformMVEVLDCombine()
15352 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP()
15407 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo)); in CombineVLDDUP()
15414 VLDDupResults.push_back(SDValue(VLDDup.getNode(), n)); in CombineVLDDUP()
15415 VLDDupResults.push_back(SDValue(VLDDup.getNode(), NumVecs)); in CombineVLDDUP()
15435 SDValue Extract = DCI.DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), ExtractVT, in PerformVDUPLANECombine()
15437 return DCI.DAG.getNode(ARMISD::VDUP, SDLoc(N), VT, Extract); in PerformVDUPLANECombine()
15462 return DCI.DAG.getNode(ISD::BITCAST, SDLoc(N), VT, Op); in PerformVDUPLANECombine()
15475 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
15476 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op)); in PerformVDUPCombine()
15478 return DAG.getNode(ARMISD::VDUP, dl, N->getValueType(0), in PerformVDUPCombine()
15479 DAG.getNode(ARMISD::VMOVrh, dl, MVT::i32, Op)); in PerformVDUPCombine()
15488 LoadSDNode *LD = dyn_cast<LoadSDNode>(Op.getNode()); in PerformVDUPCombine()
15550 SDValue WideVec = DAG.getNode(ISD::BITCAST, DL, WideVecVT, StVal); in PerformTruncatingStoreCombine()
15580 SDValue ShuffWide = DAG.getNode(ISD::BITCAST, DL, StoreVecVT, Shuff); in PerformTruncatingStoreCombine()
15589 SDValue SubVec = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, StoreType, in PerformTruncatingStoreCombine()
15595 DAG.getNode(ISD::ADD, DL, BasePtr.getValueType(), BasePtr, Increment); in PerformTruncatingStoreCombine()
15598 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformTruncatingStoreCombine()
15678 DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, NewFromVT, Trunc.getOperand(0), in PerformSplittingToNarrowingStores()
15682 DAG.getNode(ARMISD::VCVTN, DL, MVT::v8f16, DAG.getUNDEF(MVT::v8f16), in PerformSplittingToNarrowingStores()
15684 Extract = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, MVT::v4i32, FPTrunc); in PerformSplittingToNarrowingStores()
15691 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores); in PerformSplittingToNarrowingStores()
15732 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Stores); in PerformSplittingMVETruncToNarrowingStores()
15801 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
15802 StVal.getNode()->hasOneUse()) { in PerformSTORECombine()
15808 St->getChain(), DL, StVal.getNode()->getOperand(isBigEndian ? 1 : 0), in PerformSTORECombine()
15812 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformSTORECombine()
15815 StVal.getNode()->getOperand(isBigEndian ? 0 : 1), in PerformSTORECombine()
15822 StVal.getNode()->getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in PerformSTORECombine()
15831 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
15832 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
15835 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
15837 DCI.AddToWorklist(Vec.getNode()); in PerformSTORECombine()
15838 DCI.AddToWorklist(ExtElt.getNode()); in PerformSTORECombine()
15839 DCI.AddToWorklist(V.getNode()); in PerformSTORECombine()
15899 SDValue FixConv = DAG.getNode( in PerformVCVTCombine()
15905 FixConv = DAG.getNode(ISD::TRUNCATE, dl, N->getValueType(0), FixConv); in PerformVCVTCombine()
15925 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVDIVCombine()
15957 ConvInput = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, in PerformVDIVCombine()
15963 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, in PerformVDIVCombine()
16003 A = DAG.getNode(ExtendCode, dl, in PerformVECREDUCE_ADDCombine()
16020 !ISD::isBuildVectorAllZeros(N0->getOperand(2).getNode())) in PerformVECREDUCE_ADDCombine()
16072 !ISD::isBuildVectorAllZeros(N0->getOperand(2).getNode())) in PerformVECREDUCE_ADDCombine()
16108 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
16111 DAG.getNode(IsUnsigned ? ARMISD::MVEZEXT : ARMISD::MVESEXT, dl, in PerformVECREDUCE_ADDCombine()
16114 SDValue MLA0 = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in PerformVECREDUCE_ADDCombine()
16117 DAG.getNode(IsUnsigned ? ARMISD::VMLALVAu : ARMISD::VMLALVAs, dl, in PerformVECREDUCE_ADDCombine()
16120 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, MLA1, MLA1.getValue(1)); in PerformVECREDUCE_ADDCombine()
16122 SDValue Node = DAG.getNode(Opcode, dl, {MVT::i32, MVT::i32}, Ops); in PerformVECREDUCE_ADDCombine()
16123 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Node, in PerformVECREDUCE_ADDCombine()
16124 SDValue(Node.getNode(), 1)); in PerformVECREDUCE_ADDCombine()
16128 return DAG.getNode(ARMISD::VADDVs, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
16130 return DAG.getNode(ARMISD::VADDVu, dl, ResVT, A); in PerformVECREDUCE_ADDCombine()
16136 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16137 DAG.getNode(ARMISD::VADDVs, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
16139 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16140 DAG.getNode(ARMISD::VADDVu, dl, MVT::i32, A)); in PerformVECREDUCE_ADDCombine()
16144 return DAG.getNode(ARMISD::VADDVps, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
16146 return DAG.getNode(ARMISD::VADDVpu, dl, ResVT, A, Mask); in PerformVECREDUCE_ADDCombine()
16152 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16153 DAG.getNode(ARMISD::VADDVps, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
16155 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16156 DAG.getNode(ARMISD::VADDVpu, dl, MVT::i32, A, Mask)); in PerformVECREDUCE_ADDCombine()
16160 return DAG.getNode(ARMISD::VMLAVs, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
16162 return DAG.getNode(ARMISD::VMLAVu, dl, ResVT, A, B); in PerformVECREDUCE_ADDCombine()
16170 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16171 DAG.getNode(ARMISD::VMLAVs, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
16173 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16174 DAG.getNode(ARMISD::VMLAVu, dl, MVT::i32, A, B)); in PerformVECREDUCE_ADDCombine()
16178 return DAG.getNode(ARMISD::VMLAVps, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
16181 return DAG.getNode(ARMISD::VMLAVpu, dl, ResVT, A, B, Mask); in PerformVECREDUCE_ADDCombine()
16189 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16190 DAG.getNode(ARMISD::VMLAVps, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
16192 return DAG.getNode(ISD::TRUNCATE, dl, ResVT, in PerformVECREDUCE_ADDCombine()
16193 DAG.getNode(ARMISD::VMLAVpu, dl, MVT::i32, A, B, Mask)); in PerformVECREDUCE_ADDCombine()
16206 SDValue Ext = DAG.getNode(ISD::SIGN_EXTEND, dl, N0->getValueType(0), Mul); in PerformVECREDUCE_ADDCombine()
16208 Ext = DAG.getNode(ISD::VSELECT, dl, N0->getValueType(0), in PerformVECREDUCE_ADDCombine()
16210 return DAG.getNode(ISD::VECREDUCE_ADD, dl, ResVT, Ext); in PerformVECREDUCE_ADDCombine()
16236 return DCI.DAG.getNode(Op1->getOpcode(), SDLoc(Op1), N->getValueType(0), in PerformVMOVNCombine()
16289 DAG.ReplaceAllUsesWith(N, Merge.getNode()); in PerformLongShiftCombine()
16296 SDValue NewShift = DAG.getNode(NewOpcode, DL, N->getVTList(), Op0, Op1, in PerformLongShiftCombine()
16298 DAG.ReplaceAllUsesWith(N, NewShift.getNode()); in PerformLongShiftCombine()
16431 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
16449 return DAG.getNode(VShiftOpc, dl, N->getValueType(0), in PerformIntrinsicCombine()
16502 return DAG.getNode(Opc, SDLoc(N), N->getVTList(), N->getOperand(1)); in PerformIntrinsicCombine()
16520 SDValue val = DAG.getNode(Opc, dl, {MVT::i32, MVT::i32}, Ops); in PerformIntrinsicCombine()
16521 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, val.getValue(0), in PerformIntrinsicCombine()
16548 return DAG.getNode(ISD::ROTR, SDLoc(N), VT, N0, N1); in PerformShiftCombine()
16577 SDValue SHL = DAG.getNode(ISD::SHL, DL, MVT::i32, N0->getOperand(0), in PerformShiftCombine()
16579 return DAG.getNode( in PerformShiftCombine()
16601 return DAG.getNode(ARMISD::VSHLIMM, dl, VT, N->getOperand(0), in PerformShiftCombine()
16612 return DAG.getNode(VShiftOpc, dl, VT, N->getOperand(0), in PerformShiftCombine()
16627 LoadSDNode *LD = cast<LoadSDNode>(N0.getNode()); in PerformSplittingToWideningLoad()
16679 Chains.push_back(SDValue(NewLoad.getNode(), 1)); in PerformSplittingToWideningLoad()
16688 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, MVT::v8f16, Loads[i]); in PerformSplittingToWideningLoad()
16689 SDValue FPExt = DAG.getNode(ARMISD::VCVTL, DL, MVT::v4f32, LoadBC, in PerformSplittingToWideningLoad()
16697 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformSplittingToWideningLoad()
16699 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ToVT, Loads); in PerformSplittingToWideningLoad()
16736 return DAG.getNode(Opc, SDLoc(N), VT, Vec, Lane); in PerformExtendCombine()
16785 if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) || in PerformMinMaxCombine()
16788 if (!ISD::isConstantSplatVector(Max->getOperand(1).getNode(), MaxC) || in PerformMinMaxCombine()
16794 if (IsSignedSaturate(N, N0.getNode())) { in PerformMinMaxCombine()
16809 DAG.getNode(ARMISD::VQMOVNs, DL, HalfVT, DAG.getUNDEF(HalfVT), in PerformMinMaxCombine()
16811 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine()
16812 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, Bitcast, in PerformMinMaxCombine()
16828 if (!ISD::isConstantSplatVector(Min->getOperand(1).getNode(), MinC) || in PerformMinMaxCombine()
16850 DAG.getNode(ARMISD::VQMOVNu, DL, HalfVT, DAG.getUNDEF(HalfVT), N0, in PerformMinMaxCombine()
16852 SDValue Bitcast = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, VQMOVN); in PerformMinMaxCombine()
16853 return DAG.getNode(ISD::AND, DL, VT, Bitcast, in PerformMinMaxCombine()
16940 X = DAG.getNode(ISD::SRL, dl, VT, X, in PerformCMOVToBFICombine()
16950 V = DAG.getNode(ARMISD::BFI, dl, VT, V, X, in PerformCMOVToBFICombine()
17078 SDValue NewBr = DAG.getNode(ISD::BR, SDLoc(Br), MVT::Other, NewBrOps); in PerformHWLoopCombine()
17084 SDValue Setup = DAG.getNode(ARMISD::WLSSETUP, dl, MVT::i32, Elements); in PerformHWLoopCombine()
17088 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
17095 Res = DAG.getNode(ARMISD::WLS, dl, MVT::Other, Ops); in PerformHWLoopCombine()
17106 SDValue LoopDec = DAG.getNode(ARMISD::LOOP_DEC, dl, in PerformHWLoopCombine()
17108 DAG.ReplaceAllUsesWith(Int.getNode(), LoopDec.getNode()); in PerformHWLoopCombine()
17118 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in PerformHWLoopCombine()
17119 SDValue(LoopDec.getNode(), 1), Chain); in PerformHWLoopCombine()
17121 SDValue EndArgs[] = { Chain, SDValue(LoopDec.getNode(), 0), Target }; in PerformHWLoopCombine()
17122 return DAG.getNode(ARMISD::LE, dl, MVT::Other, EndArgs); in PerformHWLoopCombine()
17158 return DAG.getNode( in PerformBRCONDCombine()
17211 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
17216 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
17229 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in PerformCMOVCombine()
17245 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
17246 Res = DAG.getNode(ISD::SRL, dl, VT, DAG.getNode(ISD::CTLZ, dl, VT, Sub), in PerformCMOVCombine()
17258 SDValue Sub = DAG.getNode(ISD::SUB, dl, VT, LHS, RHS); in PerformCMOVCombine()
17260 SDValue Neg = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, Sub); in PerformCMOVCombine()
17264 DAG.getNode(ISD::SUB, dl, MVT::i32, in PerformCMOVCombine()
17266 Res = DAG.getNode(ISD::ADDCARRY, dl, VTs, Sub, Neg, Carry); in PerformCMOVCombine()
17273 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
17276 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, TrueVal, ARMcc, in PerformCMOVCombine()
17287 DAG.getNode(ARMISD::SUBS, dl, DAG.getVTList(VT, MVT::i32), LHS, RHS); in PerformCMOVCombine()
17290 Res = DAG.getNode(ARMISD::CMOV, dl, VT, Sub, FalseVal, in PerformCMOVCombine()
17320 SDValue Subc = DAG.getNode(ISD::USUBO, dl, VTs, FalseVal, TrueVal); in PerformCMOVCombine()
17321 Res = DAG.getNode(ISD::SUBCARRY, dl, VTs, FalseVal, Subc, Subc.getValue(1)); in PerformCMOVCombine()
17324 Res = DAG.getNode(ISD::SHL, dl, VT, Res, in PerformCMOVCombine()
17328 if (Res.getNode()) { in PerformCMOVCombine()
17332 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
17335 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
17338 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
17356 return DAG.getNode(ARMISD::VDUP, SDLoc(N), DstVT, Src.getOperand(0)); in PerformBITCASTCombine()
17372 return DAG.getNode(ARMISD::VECTOR_REG_CAST, SDLoc(N), DstVT, Src); in PerformBITCASTCombine()
17397 return DAG.getNode(ARMISD::MVETRUNC, DL, VT, N->getOperand(0).getOperand(0), in PerformMVETruncCombine()
17406 auto *S0 = cast<ShuffleVectorSDNode>(N->getOperand(0).getNode()); in PerformMVETruncCombine()
17407 auto *S1 = cast<ShuffleVectorSDNode>(N->getOperand(1).getNode()); in PerformMVETruncCombine()
17416 return DAG.getNode( in PerformMVETruncCombine()
17418 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)), in PerformMVETruncCombine()
17419 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)), in PerformMVETruncCombine()
17422 return DAG.getNode( in PerformMVETruncCombine()
17424 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(1)), in PerformMVETruncCombine()
17425 DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, S0->getOperand(0)), in PerformMVETruncCombine()
17442 SDValue Ext = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, O, in PerformMVETruncCombine()
17458 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformMVETruncCombine()
17468 SDValue Ptr = DAG.getNode( in PerformMVETruncCombine()
17478 SDValue Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformMVETruncCombine()
17488 LoadSDNode *LD = dyn_cast<LoadSDNode>(N0.getNode()); in PerformSplittingMVEEXTToWideningLoad()
17541 Chains.push_back(SDValue(NewLoad.getNode(), 1)); in PerformSplittingMVEEXTToWideningLoad()
17544 SDValue NewChain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chains); in PerformSplittingMVEEXTToWideningLoad()
17563 SDValue VVT = DAG.getNode(ARMISD::VECTOR_REG_CAST, DL, VT, V); in PerformMVEExtCombine()
17565 ? DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, VVT, in PerformMVEExtCombine()
17596 V0 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op0)); in PerformMVEExtCombine()
17600 V0 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op1)); in PerformMVEExtCombine()
17605 V1 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op1)); in PerformMVEExtCombine()
17609 V1 = Extend(DAG.getNode(Rev, DL, SVN->getValueType(0), Op0)); in PerformMVEExtCombine()
17611 if (V0.getNode() != N || V1.getNode() != N) in PerformMVEExtCombine()
17626 int SPFI = cast<FrameIndexSDNode>(StackPtr.getNode())->getIndex(); in PerformMVEExtCombine()
17642 SDValue Ptr = DAG.getNode( in PerformMVEExtCombine()
18178 !ExtVal->use_begin()->isOnlyUserOf(ExtVal.getNode())) in isVectorLoadExtDesirable()
18692 Ptr.getNode(), VT, Alignment, isSEXTLoad, IsMasked, in getPreIndexedAddressParts()
18696 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
18699 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
18869 ConstantSDNode *Pos = cast<ConstantSDNode>(Op.getOperand(1).getNode()); in computeKnownBitsForTargetNode()
18971 SDValue NewOp = TLO.DAG.getNode(ISD::AND, DL, VT, Op.getOperand(0), NewC); in targetShrinkDemandedConstant()
19021 Op, TLO.DAG.getNode( in SimplifyDemandedBitsForTargetNode()
19387 if (Result.getNode()) { in LowerAsmOperandForConstraint()
19460 SDValue Div = DAG.getNode(DivOpcode, dl, VT, Dividend, Divisor); in LowerDivRem()
19461 SDValue Mul = DAG.getNode(ISD::MUL, dl, VT, Div, Divisor); in LowerDivRem()
19462 SDValue Rem = DAG.getNode(ISD::SUB, dl, VT, Dividend, Mul); in LowerDivRem()
19465 return DAG.getNode(ISD::MERGE_VALUES, dl, DAG.getVTList(VT, VT), Values); in LowerDivRem()
19468 RTLIB::Libcall LC = getDivRemLibcall(Op.getNode(), in LowerDivRem()
19472 TargetLowering::ArgListTy Args = getDivRemArgList(Op.getNode(), in LowerDivRem()
19482 InChain = WinDBZCheckDenominator(DAG, Op.getNode(), InChain); in LowerDivRem()
19533 SDNode *ResNode = CallResult.first.getNode(); in LowerREM()
19553 SP = DAG.getNode(ISD::SUB, DL, MVT::i32, SP, Size); in LowerDYNAMIC_STACKALLOC()
19556 DAG.getNode(ISD::AND, DL, MVT::i32, SP.getValue(0), in LowerDYNAMIC_STACKALLOC()
19563 SDValue Words = DAG.getNode(ISD::SRL, DL, MVT::i32, Size, in LowerDYNAMIC_STACKALLOC()
19571 Chain = DAG.getNode(ARMISD::WIN__CHKSTK, DL, NodeTys, Chain, Flag); in LowerDYNAMIC_STACKALLOC()
19599 SDValue Result = DAG.getNode(ISD::FP_EXTEND, in LowerFP_EXTEND()
19621 SrcVal = DAG.getNode(ISD::STRICT_FP_EXTEND, Loc, in LowerFP_EXTEND()
19625 SrcVal = DAG.getNode(ISD::FP_EXTEND, Loc, DstVT, SrcVal); in LowerFP_EXTEND()
19686 Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0), in lowerABS()
19688 Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, HalfT, N->getOperand(0), in lowerABS()
19691 Tmp = DAG.getNode(ISD::SRA, dl, HalfT, Hi, in lowerABS()
19694 Lo = DAG.getNode(ISD::UADDO, dl, VTList, Tmp, Lo); in lowerABS()
19695 Hi = DAG.getNode(ISD::ADDCARRY, dl, VTList, Tmp, Hi, in lowerABS()
19696 SDValue(Lo.getNode(), 1)); in lowerABS()
19697 Hi = DAG.getNode(ISD::XOR, dl, HalfT, Tmp, Hi); in lowerABS()
19698 Lo = DAG.getNode(ISD::XOR, dl, HalfT, Tmp, Lo); in lowerABS()