Lines Matching refs:VecVT
6078 EVT VecVT = EVT::getVectorVT( in CombineVMOVDRRCandidateWithVecOp() local
6081 SDValue BitCast = DAG.getNode(ISD::BITCAST, dl, VecVT, ExtractSrc); in CombineVMOVDRRCandidateWithVecOp()
7816 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), IVT, NumElts); in LowerBUILD_VECTOR() local
7817 SDValue Val = DAG.getBuildVector(VecVT, dl, Ops); in LowerBUILD_VECTOR()
7874 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerBUILD_VECTOR() local
7878 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerBUILD_VECTOR()
8690 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), EltVT, NumElts); in LowerVECTOR_SHUFFLE() local
8691 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
8692 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
8703 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, Ops); in LowerVECTOR_SHUFFLE()
8723 EVT VecVT = Op.getOperand(0).getValueType(); in LowerINSERT_VECTOR_ELT_i1() local
8733 getVectorTyFromPredicateVector(VecVT).getScalarSizeInBits() / 8; in LowerINSERT_VECTOR_ELT_i1()
8770 EVT VecVT = VecIn.getValueType(); in LowerINSERT_VECTOR_ELT() local
8772 VecVT.getVectorNumElements()); in LowerINSERT_VECTOR_ELT()
8778 return DAG.getNode(ISD::BITCAST, dl, VecVT, IVecOut); in LowerINSERT_VECTOR_ELT()
8786 EVT VecVT = Op.getOperand(0).getValueType(); in LowerEXTRACT_VECTOR_ELT_i1() local
8796 getVectorTyFromPredicateVector(VecVT).getScalarSizeInBits() / 8; in LowerEXTRACT_VECTOR_ELT_i1()
12924 EVT VecVT = Ext0.getOperand(0).getValueType(); in PerformVQDMULHCombine() local
12925 if (!VecVT.isPow2VectorType() || VecVT.getVectorNumElements() == 1) in PerformVQDMULHCombine()
12927 if (Ext1.getOperand(0).getValueType() != VecVT || in PerformVQDMULHCombine()
12928 VecVT.getScalarType() != ScalarType || in PerformVQDMULHCombine()
12937 if (VecVT.getSizeInBits() < 128) { in PerformVQDMULHCombine()
12939 MVT::getVectorVT(MVT::getIntegerVT(128 / VecVT.getVectorNumElements()), in PerformVQDMULHCombine()
12940 VecVT.getVectorNumElements()); in PerformVQDMULHCombine()
12949 Trunc = DAG.getNode(ISD::TRUNCATE, DL, VecVT, Trunc); in PerformVQDMULHCombine()
12954 assert(VecVT.getSizeInBits() % 128 == 0 && "Expected a power2 type"); in PerformVQDMULHCombine()
12955 unsigned NumParts = VecVT.getSizeInBits() / 128; in PerformVQDMULHCombine()
12968 DAG.getNode(ISD::CONCAT_VECTORS, DL, VecVT, Parts)); in PerformVQDMULHCombine()
14556 EVT VecVT = EVT::getVectorVT(*DAG.getContext(), MVT::i32, NumElts); in PerformARMBUILD_VECTORCombine() local
14559 if (!TLI.isTypeLegal(VecVT)) in PerformARMBUILD_VECTORCombine()
14567 SDValue Vec = DAG.getUNDEF(VecVT); in PerformARMBUILD_VECTORCombine()
14583 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, VecVT, Vec, V, LaneIdx); in PerformARMBUILD_VECTORCombine()
14734 EVT VecVT = Op0.getValueType(); in PerformExtractEltToVMOVRRD() local
14736 if (VecVT.getVectorNumElements() != 4) in PerformExtractEltToVMOVRRD()
18866 EVT VecVT = SrcSV.getValueType(); in computeKnownBitsForTargetNode() local
18867 assert(VecVT.isVector() && "VGETLANE expected a vector type"); in computeKnownBitsForTargetNode()
18868 const unsigned NumSrcElts = VecVT.getVectorNumElements(); in computeKnownBitsForTargetNode()
18878 const unsigned SrcSz = VecVT.getVectorElementType().getSizeInBits(); in computeKnownBitsForTargetNode()