Lines Matching refs:Reg0

2159   SDValue Reg0 = CurDAG->getRegister(0, MVT::i32);  in SelectVLD()  local
2181 Ops.push_back(Reg0); in SelectVLD()
2184 Ops.push_back(Reg0); in SelectVLD()
2197 const SDValue OpsA[] = { MemAddr, Align, Reg0, ImplDef, Pred, Reg0, Chain }; in SelectVLD()
2210 Ops.push_back(Reg0); in SelectVLD()
2214 Ops.push_back(Reg0); in SelectVLD()
2294 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVST() local
2341 Ops.push_back(Reg0); in SelectVST()
2345 Ops.push_back(Reg0); in SelectVST()
2370 const SDValue OpsA[] = { MemAddr, Align, Reg0, RegSeq, Pred, Reg0, Chain }; in SelectVST()
2385 Ops.push_back(Reg0); in SelectVST()
2389 Ops.push_back(Reg0); in SelectVST()
2467 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDSTLane() local
2476 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2500 Ops.push_back(Reg0); in SelectVLDSTLane()
3004 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in SelectVLDDup() local
3018 Ops.push_back(Reg0); in SelectVLDDup()
3028 const SDValue OpsA[] = {MemAddr, Align, Pred, Reg0, Chain}; in SelectVLDDup()
3035 const SDValue OpsA[] = {MemAddr, Align, ImplDef, Pred, Reg0, Chain}; in SelectVLDDup()
3043 Ops.push_back(Reg0); in SelectVLDDup()
3357 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3365 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3376 getAL(CurDAG, dl), Reg0, Reg0 }; in tryV6T2BitfieldExtractOp()
3385 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3405 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3410 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3427 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3432 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3448 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in tryV6T2BitfieldExtractOp() local
3453 getAL(CurDAG, dl), Reg0 }; in tryV6T2BitfieldExtractOp()
3782 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3784 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3788 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3789 Reg0 }; in Select()
3801 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
3803 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select()
3807 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select()
3808 Reg0 }; in Select()
5203 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5204 SDValue Ops[] = { Src, Src, Pred, Reg0 }; in Select()
5214 SDValue Reg0 = CurDAG->getRegister(0, MVT::i32); in Select() local
5215 SDValue Ops[] = { Src, Pred, Reg0 }; in Select()
5796 unsigned Reg0 = cast<RegisterSDNode>(V0)->getReg(); in tryInlineAsm() local
5819 SDValue T0 = CurDAG->getCopyToReg(Sub0, dl, Reg0, Sub0, in tryInlineAsm()
5834 SDValue T0 = CurDAG->getCopyFromReg(Chain, dl, Reg0, MVT::i32, in tryInlineAsm()