Lines Matching refs:Predicated

246   void SelectMVE_WB(SDNode *N, const uint16_t *Opcodes, bool Predicated);
254 uint16_t OpcodeWithNoCarry, bool Add, bool Predicated);
258 void SelectMVE_VSHLC(SDNode *N, bool Predicated);
268 void SelectBaseMVE_VMLLDAV(SDNode *N, bool Predicated,
274 void SelectMVE_VMLLDAV(SDNode *N, bool Predicated, const uint16_t *OpcodesS,
278 void SelectMVE_VRMLLDAVH(SDNode *N, bool Predicated, const uint16_t *OpcodesS,
292 bool Wrapping, bool Predicated);
2559 bool Predicated) { in SelectMVE_WB() argument
2580 if (Predicated) in SelectMVE_WB()
2635 bool Add, bool Predicated) { in SelectMVE_VADCSBC() argument
2640 unsigned FirstInputOp = Predicated ? 2 : 1; in SelectMVE_VADCSBC()
2657 if (Predicated) in SelectMVE_VADCSBC()
2667 void ARMDAGToDAGISel::SelectMVE_VSHLC(SDNode *N, bool Predicated) { in SelectMVE_VSHLC() argument
2678 if (Predicated) in SelectMVE_VSHLC()
2694 void ARMDAGToDAGISel::SelectBaseMVE_VMLLDAV(SDNode *N, bool Predicated, in SelectBaseMVE_VMLLDAV() argument
2740 if (Predicated) in SelectBaseMVE_VMLLDAV()
2748 void ARMDAGToDAGISel::SelectMVE_VMLLDAV(SDNode *N, bool Predicated, in SelectMVE_VMLLDAV() argument
2764 SelectBaseMVE_VMLLDAV(N, Predicated, OpcodesS, OpcodesU, 2, SizeIndex); in SelectMVE_VMLLDAV()
2767 void ARMDAGToDAGISel::SelectMVE_VRMLLDAVH(SDNode *N, bool Predicated, in SelectMVE_VRMLLDAVH() argument
2774 SelectBaseMVE_VMLLDAV(N, Predicated, OpcodesS, OpcodesU, 1, 0); in SelectMVE_VRMLLDAVH()
2834 bool Wrapping, bool Predicated) { in SelectMVE_VxDUP() argument
2857 if (Predicated) in SelectMVE_VxDUP()
2868 if (Predicated) in SelectMVE_VxDUP()