Lines Matching refs:Ops
234 void AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc,
237 void AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc,
241 void AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc);
243 void AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc, EVT InactiveTy);
1640 SDValue Ops[]= { Base, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1643 MVT::Other, Ops); in tryARMIndexedLoad()
1650 SDValue Ops[]= { Base, Offset, AMOpc, getAL(CurDAG, SDLoc(N)), in tryARMIndexedLoad() local
1653 MVT::Other, Ops); in tryARMIndexedLoad()
1681 SDValue Ops[]= { Base, getAL(CurDAG, SDLoc(N)), in tryT1IndexedLoad() local
1684 MVT::i32, MVT::Other, Ops); in tryT1IndexedLoad()
1729 SDValue Ops[]= { Base, Offset, getAL(CurDAG, SDLoc(N)), in tryT2IndexedLoad() local
1732 MVT::Other, Ops); in tryT2IndexedLoad()
1825 SDValue Ops[] = {Base, NewOffset, in tryMVEIndexedLoad() local
1829 N->getValueType(0), MVT::Other, Ops); in tryMVEIndexedLoad()
1845 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createGPRPairNode() local
1846 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createGPRPairNode()
1856 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createSRegPairNode() local
1857 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createSRegPairNode()
1867 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createDRegPairNode() local
1868 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createDRegPairNode()
1878 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1 }; in createQRegPairNode() local
1879 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQRegPairNode()
1892 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadSRegsNode() local
1894 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQuadSRegsNode()
1907 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadDRegsNode() local
1909 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQuadDRegsNode()
1922 const SDValue Ops[] = { RegClass, V0, SubReg0, V1, SubReg1, in createQuadQRegsNode() local
1924 return CurDAG->getMachineNode(TargetOpcode::REG_SEQUENCE, dl, VT, Ops); in createQuadQRegsNode()
2161 SmallVector<SDValue, 7> Ops; in SelectVLD() local
2167 Ops.push_back(MemAddr); in SelectVLD()
2168 Ops.push_back(Align); in SelectVLD()
2177 Ops.push_back(Inc); in SelectVLD()
2181 Ops.push_back(Reg0); in SelectVLD()
2183 Ops.push_back(Pred); in SelectVLD()
2184 Ops.push_back(Reg0); in SelectVLD()
2185 Ops.push_back(Chain); in SelectVLD()
2186 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLD()
2203 Ops.push_back(SDValue(VLdA, 1)); in SelectVLD()
2204 Ops.push_back(Align); in SelectVLD()
2210 Ops.push_back(Reg0); in SelectVLD()
2212 Ops.push_back(SDValue(VLdA, 0)); in SelectVLD()
2213 Ops.push_back(Pred); in SelectVLD()
2214 Ops.push_back(Reg0); in SelectVLD()
2215 Ops.push_back(Chain); in SelectVLD()
2216 VLd = CurDAG->getMachineNode(QOpcodes1[OpcodeIndex], dl, ResTys, Ops); in SelectVLD()
2295 SmallVector<SDValue, 7> Ops; in SelectVST() local
2326 Ops.push_back(MemAddr); in SelectVST()
2327 Ops.push_back(Align); in SelectVST()
2336 Ops.push_back(Inc); in SelectVST()
2341 Ops.push_back(Reg0); in SelectVST()
2343 Ops.push_back(SrcReg); in SelectVST()
2344 Ops.push_back(Pred); in SelectVST()
2345 Ops.push_back(Reg0); in SelectVST()
2346 Ops.push_back(Chain); in SelectVST()
2347 SDNode *VSt = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVST()
2378 Ops.push_back(SDValue(VStA, 0)); in SelectVST()
2379 Ops.push_back(Align); in SelectVST()
2385 Ops.push_back(Reg0); in SelectVST()
2387 Ops.push_back(RegSeq); in SelectVST()
2388 Ops.push_back(Pred); in SelectVST()
2389 Ops.push_back(Reg0); in SelectVST()
2390 Ops.push_back(Chain); in SelectVST()
2392 Ops); in SelectVST()
2469 SmallVector<SDValue, 8> Ops; in SelectVLDSTLane() local
2470 Ops.push_back(MemAddr); in SelectVLDSTLane()
2471 Ops.push_back(Align); in SelectVLDSTLane()
2476 Ops.push_back(IsImmUpdate ? Reg0 : Inc); in SelectVLDSTLane()
2497 Ops.push_back(SuperReg); in SelectVLDSTLane()
2498 Ops.push_back(getI32Imm(Lane, dl)); in SelectVLDSTLane()
2499 Ops.push_back(Pred); in SelectVLDSTLane()
2500 Ops.push_back(Reg0); in SelectVLDSTLane()
2501 Ops.push_back(Chain); in SelectVLDSTLane()
2505 SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLDSTLane()
2528 void ARMDAGToDAGISel::AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc, in AddMVEPredicateToOps() argument
2530 Ops.push_back(CurDAG->getTargetConstant(ARMVCC::Then, Loc, MVT::i32)); in AddMVEPredicateToOps()
2531 Ops.push_back(PredicateMask); in AddMVEPredicateToOps()
2535 void ARMDAGToDAGISel::AddMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc, in AddMVEPredicateToOps() argument
2538 Ops.push_back(CurDAG->getTargetConstant(ARMVCC::Then, Loc, MVT::i32)); in AddMVEPredicateToOps()
2539 Ops.push_back(PredicateMask); in AddMVEPredicateToOps()
2540 Ops.push_back(Inactive); in AddMVEPredicateToOps()
2544 void ARMDAGToDAGISel::AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc) { in AddEmptyMVEPredicateToOps() argument
2545 Ops.push_back(CurDAG->getTargetConstant(ARMVCC::None, Loc, MVT::i32)); in AddEmptyMVEPredicateToOps()
2546 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in AddEmptyMVEPredicateToOps()
2550 void ARMDAGToDAGISel::AddEmptyMVEPredicateToOps(SDValueVector &Ops, SDLoc Loc, in AddEmptyMVEPredicateToOps() argument
2552 Ops.push_back(CurDAG->getTargetConstant(ARMVCC::None, Loc, MVT::i32)); in AddEmptyMVEPredicateToOps()
2553 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in AddEmptyMVEPredicateToOps()
2554 Ops.push_back(SDValue( in AddEmptyMVEPredicateToOps()
2561 SmallVector<SDValue, 8> Ops; in SelectMVE_WB() local
2575 Ops.push_back(N->getOperand(2)); // vector of base addresses in SelectMVE_WB()
2578 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate offset in SelectMVE_WB()
2581 AddMVEPredicateToOps(Ops, Loc, N->getOperand(4)); in SelectMVE_WB()
2583 AddEmptyMVEPredicateToOps(Ops, Loc); in SelectMVE_WB()
2585 Ops.push_back(N->getOperand(0)); // chain in SelectMVE_WB()
2592 SDNode *New = CurDAG->getMachineNode(Opcode, SDLoc(N), VTs, Ops); in SelectMVE_WB()
2604 SmallVector<SDValue, 8> Ops; in SelectMVE_LongShift() local
2607 Ops.push_back(N->getOperand(1)); in SelectMVE_LongShift()
2608 Ops.push_back(N->getOperand(2)); in SelectMVE_LongShift()
2613 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_LongShift()
2615 Ops.push_back(N->getOperand(3)); in SelectMVE_LongShift()
2622 Ops.push_back(getI32Imm(SatBit, Loc)); in SelectMVE_LongShift()
2627 Ops.push_back(getAL(CurDAG, Loc)); in SelectMVE_LongShift()
2628 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in SelectMVE_LongShift()
2630 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops)); in SelectMVE_LongShift()
2637 SmallVector<SDValue, 8> Ops; in SelectMVE_VADCSBC() local
2643 Ops.push_back(N->getOperand(FirstInputOp)); in SelectMVE_VADCSBC()
2644 Ops.push_back(N->getOperand(FirstInputOp + 1)); in SelectMVE_VADCSBC()
2653 Ops.push_back(CarryIn); in SelectMVE_VADCSBC()
2658 AddMVEPredicateToOps(Ops, Loc, in SelectMVE_VADCSBC()
2662 AddEmptyMVEPredicateToOps(Ops, Loc, N->getValueType(0)); in SelectMVE_VADCSBC()
2664 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops)); in SelectMVE_VADCSBC()
2669 SmallVector<SDValue, 8> Ops; in SelectMVE_VSHLC() local
2673 Ops.push_back(N->getOperand(1)); in SelectMVE_VSHLC()
2674 Ops.push_back(N->getOperand(2)); in SelectMVE_VSHLC()
2676 Ops.push_back(getI32Imm(ImmValue, Loc)); // immediate shift count in SelectMVE_VSHLC()
2679 AddMVEPredicateToOps(Ops, Loc, N->getOperand(4)); in SelectMVE_VSHLC()
2681 AddEmptyMVEPredicateToOps(Ops, Loc); in SelectMVE_VSHLC()
2683 CurDAG->SelectNodeTo(N, ARM::MVE_VSHLC, N->getVTList(), makeArrayRef(Ops)); in SelectMVE_VSHLC()
2730 SmallVector<SDValue, 8> Ops; in SelectBaseMVE_VMLLDAV() local
2733 Ops.push_back(N->getOperand(4)); in SelectBaseMVE_VMLLDAV()
2734 Ops.push_back(N->getOperand(5)); in SelectBaseMVE_VMLLDAV()
2737 Ops.push_back(N->getOperand(6)); in SelectBaseMVE_VMLLDAV()
2738 Ops.push_back(N->getOperand(7)); in SelectBaseMVE_VMLLDAV()
2741 AddMVEPredicateToOps(Ops, Loc, N->getOperand(8)); in SelectBaseMVE_VMLLDAV()
2743 AddEmptyMVEPredicateToOps(Ops, Loc); in SelectBaseMVE_VMLLDAV()
2745 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops)); in SelectBaseMVE_VMLLDAV()
2807 SDValue Ops[] = {Data, N->getOperand(PtrOperand), Chain}; in SelectMVE_VLD() local
2809 CurDAG->getMachineNode(OurOpcodes[Stage], Loc, ResultTys, Ops); in SelectMVE_VLD()
2817 SDValue Ops[] = {Data, N->getOperand(PtrOperand), Chain}; in SelectMVE_VLD() local
2819 CurDAG->getMachineNode(OurOpcodes[NumVecs - 1], Loc, ResultTys, Ops); in SelectMVE_VLD()
2853 SmallVector<SDValue, 8> Ops; in SelectMVE_VxDUP() local
2860 Ops.push_back(N->getOperand(OpIdx++)); // base in SelectMVE_VxDUP()
2862 Ops.push_back(N->getOperand(OpIdx++)); // limit in SelectMVE_VxDUP()
2866 Ops.push_back(getI32Imm(ImmValue, Loc)); in SelectMVE_VxDUP()
2869 AddMVEPredicateToOps(Ops, Loc, N->getOperand(OpIdx), Inactive); in SelectMVE_VxDUP()
2871 AddEmptyMVEPredicateToOps(Ops, Loc, N->getValueType(0)); in SelectMVE_VxDUP()
2873 CurDAG->SelectNodeTo(N, Opcode, N->getVTList(), makeArrayRef(Ops)); in SelectMVE_VxDUP()
2880 SmallVector<SDValue, 8> Ops; in SelectCDE_CXxD() local
2887 Ops.push_back(getI32Imm(ImmCoprocVal, Loc)); in SelectCDE_CXxD()
2896 Ops.push_back(SDValue(createGPRPairNode(MVT::Untyped, AccLo, AccHi), 0)); in SelectCDE_CXxD()
2901 Ops.push_back(N->getOperand(OpIdx++)); in SelectCDE_CXxD()
2906 Ops.push_back(getI32Imm(ImmVal, Loc)); in SelectCDE_CXxD()
2912 Ops.push_back(Pred); in SelectCDE_CXxD()
2913 Ops.push_back(PredReg); in SelectCDE_CXxD()
2917 SDNode *InstrNode = CurDAG->getMachineNode(Opcode, Loc, MVT::Untyped, Ops); in SelectCDE_CXxD()
3006 SmallVector<SDValue, 6> Ops; in SelectVLDDup() local
3007 Ops.push_back(MemAddr); in SelectVLDDup()
3008 Ops.push_back(Align); in SelectVLDDup()
3018 Ops.push_back(Reg0); in SelectVLDDup()
3022 Ops.push_back(Inc); in SelectVLDDup()
3038 Ops.push_back(SDValue(VLdA, 0)); in SelectVLDDup()
3042 Ops.push_back(Pred); in SelectVLDDup()
3043 Ops.push_back(Reg0); in SelectVLDDup()
3044 Ops.push_back(Chain); in SelectVLDDup()
3046 SDNode *VLdDup = CurDAG->getMachineNode(Opc, dl, ResTys, Ops); in SelectVLDDup()
3236 SmallVector<SDValue, 3> Ops{ in transformFixedFloatingPointConversion() local
3238 AddEmptyMVEPredicateToOps(Ops, SDLoc(N), Type); in transformFixedFloatingPointConversion()
3259 ReplaceNode(N, CurDAG->getMachineNode(Opcode, SDLoc(N), Type, Ops)); in transformFixedFloatingPointConversion()
3295 SmallVector<SDValue, 3> Ops{Node->getOperand(0), in tryFP_TO_INT() local
3297 AddEmptyMVEPredicateToOps(Ops, dl, Type); in tryFP_TO_INT()
3299 ReplaceNode(N, CurDAG->getMachineNode(Opcode, dl, Type, Ops)); in tryFP_TO_INT()
3363 SDValue Ops[] = { N->getOperand(0).getOperand(0), in tryV6T2BitfieldExtractOp() local
3366 CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops); in tryV6T2BitfieldExtractOp()
3375 SDValue Ops[] = { N->getOperand(0).getOperand(0), ShOpc, in tryV6T2BitfieldExtractOp() local
3377 CurDAG->SelectNodeTo(N, ARM::MOVsi, MVT::i32, Ops); in tryV6T2BitfieldExtractOp()
3382 SDValue Ops[] = { N->getOperand(0).getOperand(0), in tryV6T2BitfieldExtractOp() local
3386 CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops); in tryV6T2BitfieldExtractOp()
3407 SDValue Ops[] = { N->getOperand(0).getOperand(0), in tryV6T2BitfieldExtractOp() local
3411 CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops); in tryV6T2BitfieldExtractOp()
3429 SDValue Ops[] = { N->getOperand(0).getOperand(0), in tryV6T2BitfieldExtractOp() local
3433 CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops); in tryV6T2BitfieldExtractOp()
3450 SDValue Ops[] = { N->getOperand(0).getOperand(0), in tryV6T2BitfieldExtractOp() local
3454 CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops); in tryV6T2BitfieldExtractOp()
3514 SDValue Ops[] = {N->getOperand(1), N->getOperand(2), N->getOperand(3), in SelectCMP_SWAP() local
3518 CurDAG->getVTList(MVT::i32, MVT::i32, MVT::Other), Ops); in SelectCMP_SWAP()
3571 SDValue Ops[] = { Src, CurDAG->getTargetConstant(Imm, dl, MVT::i32), in SelectCMPZ() local
3574 return CurDAG->getMachineNode(Opc, dl, MVT::i32, Ops); in SelectCMPZ()
3576 SDValue Ops[] = {CurDAG->getRegister(ARM::CPSR, MVT::i32), Src, in SelectCMPZ() local
3579 return CurDAG->getMachineNode(Opc, dl, MVT::i32, Ops); in SelectCMPZ()
3641 SDValue Ops[] = {ST->getValue(), in Select() local
3648 CurDAG->getMachineNode(ARM::tSTRspi, dl, MVT::Other, Ops); in Select()
3686 SDValue Ops[] = { in Select() local
3693 Ops); in Select()
3695 SDValue Ops[] = { in Select() local
3703 Ops); in Select()
3739 SDValue Ops[] = { TFI, CurDAG->getTargetConstant(0, dl, MVT::i32), in Select() local
3742 CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops); in Select()
3784 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select() local
3785 CurDAG->SelectNodeTo(N, ARM::t2ADDrs, MVT::i32, Ops); in Select()
3788 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select() local
3790 CurDAG->SelectNodeTo(N, ARM::ADDrsi, MVT::i32, Ops); in Select()
3803 SDValue Ops[] = { V, V, ShImmOp, getAL(CurDAG, dl), Reg0, Reg0 }; in Select() local
3804 CurDAG->SelectNodeTo(N, ARM::t2RSBrs, MVT::i32, Ops); in Select()
3807 SDValue Ops[] = { V, V, Reg0, ShImmOp, getAL(CurDAG, dl), Reg0, in Select() local
3809 CurDAG->SelectNodeTo(N, ARM::RSBrsi, MVT::i32, Ops); in Select()
3846 SDValue Ops[] = {CurDAG->getRegister(ARM::CPSR, MVT::i32), in Select() local
3849 ReplaceNode(N, CurDAG->getMachineNode(ARM::tBIC, dl, MVT::i32, Ops)); in Select()
3852 SDValue Ops[] = {N->getOperand(0), NewImm, getAL(CurDAG, dl), in Select() local
3856 CurDAG->getMachineNode(ARM::t2BICrr, dl, MVT::i32, Ops)); in Select()
3891 SDValue Ops[] = { N0.getOperand(0), Imm16, in Select() local
3893 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, VT, Ops)); in Select()
3902 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), in Select() local
3906 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, MVT::i32, MVT::i32, Ops)); in Select()
3911 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
3915 N, CurDAG->getMachineNode(ARM::t2UMLAL, dl, MVT::i32, MVT::i32, Ops)); in Select()
3918 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
3924 MVT::i32, MVT::i32, Ops)); in Select()
3930 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
3934 N, CurDAG->getMachineNode(ARM::t2SMLAL, dl, MVT::i32, MVT::i32, Ops)); in Select()
3937 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2), in Select() local
3943 MVT::i32, MVT::i32, Ops)); in Select()
3972 SDValue Ops[] = { SmulLoHi.getOperand(0), SmulLoHi.getOperand(1), in Select() local
3975 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, MVT::i32, Ops)); in Select()
4013 SDValue Ops[] = { N->getOperand(1), in Select() local
4017 SDNode *New = CurDAG->getMachineNode(Opc, dl, MVT::Other, Ops); in Select()
4037 SDValue Ops[] = {Base, RegOffset, ImmOffset, Chain}; in Select() local
4039 {MVT::Untyped, MVT::Other}, Ops); in Select()
4068 SDValue Ops[] = {SDValue(RegPair, 0), Base, RegOffset, ImmOffset, Chain}; in Select() local
4069 SDNode *New = CurDAG->getMachineNode(ARM::STOREDUAL, dl, MVT::Other, Ops); in Select()
4076 SDValue Ops[] = { N->getOperand(1), in Select() local
4081 CurDAG->getVTList(MVT::i32, MVT::Other), Ops); in Select()
4161 SDValue Ops[] = { N1, Tmp2, N3, Chain, InFlag }; in Select() local
4163 MVT::Glue, Ops); in Select()
4192 SDValue Ops[] = { X, CurDAG->getTargetConstant(Addend, dl, MVT::i32), in Select() local
4195 Add = CurDAG->getMachineNode(ARM::t2ADDri, dl, MVT::i32, Ops); in Select()
4198 SDValue Ops[] = {CurDAG->getRegister(ARM::CPSR, MVT::i32), X, in Select() local
4201 Add = CurDAG->getMachineNode(Opc, dl, MVT::i32, Ops); in Select()
4235 SDValue Ops[] = {N->getOperand(0), N->getOperand(1), NewARMcc, in Select() local
4237 CurDAG->MorphNodeTo(N, ARMISD::CMOV, N->getVTList(), Ops); in Select()
4264 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
4265 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, VT, VT, Ops)); in Select()
4287 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
4288 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, VT, VT, Ops)); in Select()
4309 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), Pred, PredReg }; in Select() local
4310 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, VT, VT, Ops)); in Select()
4742 SmallVector<SDValue, 5> Ops; in Select() local
4743 … Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(2))->getZExtValue(), dl)); /* coproc */ in Select()
4744 … Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(3))->getZExtValue(), dl)); /* opc */ in Select()
4745 … Ops.push_back(getI32Imm(cast<ConstantSDNode>(N->getOperand(4))->getZExtValue(), dl)); /* CRm */ in Select()
4751 Ops.push_back(getAL(CurDAG, dl)); in Select()
4752 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in Select()
4755 Ops.push_back(Chain); in Select()
4760 ReplaceNode(N, CurDAG->getMachineNode(Opc, dl, RetType, Ops)); in Select()
4784 SDValue Ops[] = {MemAddr, getAL(CurDAG, dl), in Select() local
4786 SDNode *Ld = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select()
4837 SmallVector<SDValue, 7> Ops; in Select() local
4839 Ops.push_back(Val0); in Select()
4840 Ops.push_back(Val1); in Select()
4843 Ops.push_back(SDValue(createGPRPairNode(MVT::Untyped, Val0, Val1), 0)); in Select()
4844 Ops.push_back(MemAddr); in Select()
4845 Ops.push_back(getAL(CurDAG, dl)); in Select()
4846 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in Select()
4847 Ops.push_back(Chain); in Select()
4853 SDNode *St = CurDAG->getMachineNode(NewOpc, dl, ResTys, Ops); in Select()
5204 SDValue Ops[] = { Src, Src, Pred, Reg0 }; in Select() local
5205 CurDAG->SelectNodeTo(N, ARM::BF16_VCVTB, DestTy, Ops); in Select()
5215 SDValue Ops[] = { Src, Pred, Reg0 }; in Select() local
5216 CurDAG->SelectNodeTo(N, ARM::BF16_VCVT, MVT::v4bf16, Ops); in Select()
5384 std::vector<SDValue> &Ops) { in getIntOperandsFromRegisterString() argument
5395 Ops.push_back(CurDAG->getTargetConstant(IntField, DL, MVT::i32)); in getIntOperandsFromRegisterString()
5507 std::vector<SDValue> Ops; in tryReadRegister() local
5508 getIntOperandsFromRegisterString(RegString->getString(), CurDAG, DL, Ops); in tryReadRegister()
5510 if (!Ops.empty()) { in tryReadRegister()
5517 if (Ops.size() == 5){ in tryReadRegister()
5521 assert(Ops.size() == 3 && in tryReadRegister()
5527 Ops.push_back(getAL(CurDAG, DL)); in tryReadRegister()
5528 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in tryReadRegister()
5529 Ops.push_back(N->getOperand(0)); in tryReadRegister()
5530 ReplaceNode(N, CurDAG->getMachineNode(Opcode, DL, ResTypes, Ops)); in tryReadRegister()
5538 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), in tryReadRegister()
5543 DL, MVT::i32, MVT::Other, Ops)); in tryReadRegister()
5568 Ops = { getAL(CurDAG, DL), CurDAG->getRegister(0, MVT::i32), in tryReadRegister()
5571 CurDAG->getMachineNode(Opcode, DL, MVT::i32, MVT::Other, Ops)); in tryReadRegister()
5583 SDValue Ops[] = { CurDAG->getTargetConstant(SYSmValue, DL, MVT::i32), in tryReadRegister() local
5587 N, CurDAG->getMachineNode(ARM::t2MRS_M, DL, MVT::i32, MVT::Other, Ops)); in tryReadRegister()
5594 Ops = { getAL(CurDAG, DL), CurDAG->getRegister(0, MVT::i32), in tryReadRegister()
5597 DL, MVT::i32, MVT::Other, Ops)); in tryReadRegister()
5602 Ops = { getAL(CurDAG, DL), CurDAG->getRegister(0, MVT::i32), in tryReadRegister()
5606 MVT::i32, MVT::Other, Ops)); in tryReadRegister()
5622 std::vector<SDValue> Ops; in tryWriteRegister() local
5623 getIntOperandsFromRegisterString(RegString->getString(), CurDAG, DL, Ops); in tryWriteRegister()
5625 if (!Ops.empty()) { in tryWriteRegister()
5631 if (Ops.size() == 5) { in tryWriteRegister()
5633 Ops.insert(Ops.begin()+2, N->getOperand(2)); in tryWriteRegister()
5635 assert(Ops.size() == 3 && in tryWriteRegister()
5639 Ops.insert(Ops.begin()+2, WriteValue, WriteValue+2); in tryWriteRegister()
5642 Ops.push_back(getAL(CurDAG, DL)); in tryWriteRegister()
5643 Ops.push_back(CurDAG->getRegister(0, MVT::i32)); in tryWriteRegister()
5644 Ops.push_back(N->getOperand(0)); in tryWriteRegister()
5646 ReplaceNode(N, CurDAG->getMachineNode(Opcode, DL, MVT::Other, Ops)); in tryWriteRegister()
5653 Ops = { CurDAG->getTargetConstant(BankedReg, DL, MVT::i32), N->getOperand(2), in tryWriteRegister()
5658 DL, MVT::Other, Ops)); in tryWriteRegister()
5676 Ops = { N->getOperand(2), getAL(CurDAG, DL), in tryWriteRegister()
5678 ReplaceNode(N, CurDAG->getMachineNode(Opcode, DL, MVT::Other, Ops)); in tryWriteRegister()
5694 SDValue Ops[] = { CurDAG->getTargetConstant(SYSmValue, DL, MVT::i32), in tryWriteRegister() local
5697 ReplaceNode(N, CurDAG->getMachineNode(ARM::t2MSR_M, DL, MVT::Other, Ops)); in tryWriteRegister()
5706 Ops = { CurDAG->getTargetConstant(Mask, DL, MVT::i32), N->getOperand(2), in tryWriteRegister()
5710 DL, MVT::Other, Ops)); in tryWriteRegister()
5824 std::vector<SDValue> Ops(GU->op_begin(), GU->op_end()-1); in tryInlineAsm() local
5825 Ops.push_back(T1.getValue(1)); in tryInlineAsm()
5826 CurDAG->UpdateNodeOperands(GU, Ops); in tryInlineAsm()