300   Register ResultReg = createResultReg(RC);  in fastEmitInst_r()
322   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_rr()
349   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_ri()
374   unsigned ResultReg = createResultReg(RC);  in fastEmitInst_i()
395   unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMoveToFPReg()
405   unsigned MoveReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMoveToIntReg()
431     unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeFP()
443   unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeFP()
465     unsigned ImmReg = createResultReg(RC);  in ARMMaterializeInt()
481       unsigned ImmReg = createResultReg(RC);  in ARMMaterializeInt()
503   ResultReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeInt()
534   unsigned DestReg = createResultReg(RC);  in ARMMaterializeGV()
592         unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeGV()
608     unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMMaterializeGV()
660     unsigned ResultReg = createResultReg(RC);  in fastMaterializeAlloca()
835     unsigned ResultReg = createResultReg(RC);  in ARMSimplifyAddress()
985     ResultReg = createResultReg(RC);  in ARMEmitLoad()
994     unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::f32));  in ARMEmitLoad()
1047       unsigned Res = createResultReg(isThumb2 ? &ARM::tGPRRegClass  in ARMEmitStore()
1098         unsigned MoveReg = createResultReg(TLI.getRegClassFor(MVT::i32));  in ARMEmitStore()
1471   unsigned DestReg = createResultReg(RC);  in SelectCmp()
1494   unsigned Result = createResultReg(&ARM::DPRRegClass);  in SelectFPExt()
1513   unsigned Result = createResultReg(&ARM::SPRRegClass);  in SelectFPTrunc()
1559   unsigned ResultReg = createResultReg(TLI.getRegClassFor(DstVT));  in SelectIToFP()
1586   unsigned ResultReg = createResultReg(TLI.getRegClassFor(MVT::f32));  in SelectFPToI()
1652   unsigned ResultReg = createResultReg(RC);  in SelectSelect()
1763   unsigned ResultReg = createResultReg(&ARM::GPRnopcRegClass);  in SelectBinaryIntOp()
1812   unsigned ResultReg = createResultReg(TLI.getRegClassFor(VT.SimpleTy));  in SelectBinaryFPOp()
2039       Register ResultReg = createResultReg(DstRC);  in FinishCall()
2060       Register ResultReg = createResultReg(DstRC);  in FinishCall()
2507       DestReg = createResultReg(RC);  in SelectIntrinsicCall()
2716     ResultReg = createResultReg(RC);  in ARMEmitIntExt()
2800   unsigned ResultReg = createResultReg(&ARM::GPRnopcRegClass);  in SelectShift()
2978   unsigned DestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMLowerPICELF()
2990     unsigned NewDestReg = createResultReg(TLI.getRegClassFor(VT));  in ARMLowerPICELF()
3064     unsigned ResultReg = createResultReg(RC);  in fastLowerArguments()