Lines Matching refs:MF
63 ARMBaseRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { in getCalleeSavedRegs()
64 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
65 bool UseSplitPush = STI.splitFramePushPop(*MF); in getCalleeSavedRegs()
71 const Function &F = MF->getFunction(); in getCalleeSavedRegs()
109 return MF->getInfo<ARMFunctionInfo>()->isSplitCSR() in getCalleeSavedRegs()
116 const MachineFunction *MF) const { in getCalleeSavedRegsViaCopy()
117 assert(MF && "Invalid MachineFunction pointer."); in getCalleeSavedRegsViaCopy()
118 if (MF->getFunction().getCallingConv() == CallingConv::CXX_FAST_TLS && in getCalleeSavedRegsViaCopy()
119 MF->getInfo<ARMFunctionInfo>()->isSplitCSR()) in getCalleeSavedRegsViaCopy()
125 ARMBaseRegisterInfo::getCallPreservedMask(const MachineFunction &MF, in getCallPreservedMask() argument
127 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
138 MF.getFunction().getAttributes().hasAttrSomewhere(Attribute::SwiftError)) in getCallPreservedMask()
153 ARMBaseRegisterInfo::getTLSCallPreservedMask(const MachineFunction &MF) const { in getTLSCallPreservedMask()
154 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
160 ARMBaseRegisterInfo::getSjLjDispatchPreservedMask(const MachineFunction &MF) const { in getSjLjDispatchPreservedMask()
161 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getSjLjDispatchPreservedMask()
169 ARMBaseRegisterInfo::getThisReturnPreservedMask(const MachineFunction &MF, in getThisReturnPreservedMask() argument
171 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
188 const MachineFunction *MF) const { in getIntraCallClobberedRegs()
194 getReservedRegs(const MachineFunction &MF) const { in getReservedRegs()
195 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
196 const ARMFrameLowering *TFI = getFrameLowering(MF); in getReservedRegs()
204 if (TFI->hasFP(MF)) in getReservedRegs()
206 if (hasBasePointer(MF)) in getReservedRegs()
230 isAsmClobberable(const MachineFunction &MF, MCRegister PhysReg) const { in isAsmClobberable() argument
231 return !getReservedRegs(MF).test(PhysReg); in isAsmClobberable()
234 bool ARMBaseRegisterInfo::isInlineAsmReadOnlyReg(const MachineFunction &MF, in isInlineAsmReadOnlyReg() argument
236 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in isInlineAsmReadOnlyReg()
237 const ARMFrameLowering *TFI = getFrameLowering(MF); in isInlineAsmReadOnlyReg()
241 if (TFI->hasFP(MF)) in isInlineAsmReadOnlyReg()
243 if (hasBasePointer(MF)) in isInlineAsmReadOnlyReg()
251 const MachineFunction &MF) const { in getLargestLegalSuperClass()
264 if (MF.getSubtarget<ARMSubtarget>().hasNEON()) in getLargestLegalSuperClass()
273 ARMBaseRegisterInfo::getPointerRegClass(const MachineFunction &MF, unsigned Kind) in getPointerRegClass() argument
287 MachineFunction &MF) const { in getRegPressureLimit()
288 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
289 const ARMFrameLowering *TFI = getFrameLowering(MF); in getRegPressureLimit()
298 bool HasFP = MF.getFrameInfo().isMaxCallFrameSizeComputed() in getRegPressureLimit()
299 ? TFI->hasFP(MF) : true; in getRegPressureLimit()
303 bool HasFP = MF.getFrameInfo().isMaxCallFrameSizeComputed() in getRegPressureLimit()
304 ? TFI->hasFP(MF) : true; in getRegPressureLimit()
325 SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, in getRegAllocationHints() argument
327 const MachineRegisterInfo &MRI = MF.getRegInfo(); in getRegAllocationHints()
339 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
344 return TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM); in getRegAllocationHints()
379 MachineFunction &MF) const { in updateRegAllocHint()
380 MachineRegisterInfo *MRI = &MF.getRegInfo(); in updateRegAllocHint()
403 bool ARMBaseRegisterInfo::hasBasePointer(const MachineFunction &MF) const { in hasBasePointer()
404 const MachineFrameInfo &MFI = MF.getFrameInfo(); in hasBasePointer()
405 const ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in hasBasePointer()
406 const ARMFrameLowering *TFI = getFrameLowering(MF); in hasBasePointer()
411 if (hasStackRealignment(MF) && !TFI->hasReservedCallFrame(MF)) in hasBasePointer()
435 if (AFI->isThumb1OnlyFunction() && !TFI->hasReservedCallFrame(MF)) in hasBasePointer()
440 bool ARMBaseRegisterInfo::canRealignStack(const MachineFunction &MF) const { in canRealignStack()
441 const MachineRegisterInfo *MRI = &MF.getRegInfo(); in canRealignStack()
442 const ARMFrameLowering *TFI = getFrameLowering(MF); in canRealignStack()
443 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in canRealignStack()
447 if (!TargetRegisterInfo::canRealignStack(MF)) in canRealignStack()
455 if (TFI->hasReservedCallFrame(MF)) in canRealignStack()
463 cannotEliminateFrame(const MachineFunction &MF) const { in cannotEliminateFrame()
464 const MachineFrameInfo &MFI = MF.getFrameInfo(); in cannotEliminateFrame()
465 if (MF.getTarget().Options.DisableFramePointerElim(MF) && MFI.adjustsStack()) in cannotEliminateFrame()
468 hasStackRealignment(MF); in cannotEliminateFrame()
472 ARMBaseRegisterInfo::getFrameRegister(const MachineFunction &MF) const { in getFrameRegister()
473 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getFrameRegister()
474 const ARMFrameLowering *TFI = getFrameLowering(MF); in getFrameRegister()
476 if (TFI->hasFP(MF)) in getFrameRegister()
487 MachineFunction &MF = *MBB.getParent(); in emitLoadConstPool() local
488 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); in emitLoadConstPool()
489 MachineConstantPool *ConstantPool = MF.getConstantPool(); in emitLoadConstPool()
491 ConstantInt::get(Type::getInt32Ty(MF.getFunction().getContext()), Val); in emitLoadConstPool()
503 requiresRegisterScavenging(const MachineFunction &MF) const { in requiresRegisterScavenging()
508 requiresFrameIndexScavenging(const MachineFunction &MF) const { in requiresFrameIndexScavenging()
513 requiresVirtualBaseRegisters(const MachineFunction &MF) const { in requiresVirtualBaseRegisters()
602 MachineFunction &MF = *MI->getParent()->getParent(); in needsFrameBaseReg() local
603 const ARMFrameLowering *TFI = getFrameLowering(MF); in needsFrameBaseReg()
604 MachineFrameInfo &MFI = MF.getFrameInfo(); in needsFrameBaseReg()
605 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in needsFrameBaseReg()
629 if (TFI->hasFP(MF) && in needsFrameBaseReg()
631 canRealignStack(MF))) { in needsFrameBaseReg()
632 if (isFrameOffsetLegal(MI, getFrameRegister(MF), FPOffset)) in needsFrameBaseReg()
662 const MachineFunction &MF = *MBB->getParent(); in materializeFrameBaseRegister() local
664 const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); in materializeFrameBaseRegister()
667 MRI.constrainRegClass(BaseReg, TII.getRegClass(MCID, 0, this, MF)); in materializeFrameBaseRegister()
681 MachineFunction &MF = *MBB.getParent(); in resolveFrameIndex() local
683 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in resolveFrameIndex()
684 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in resolveFrameIndex()
778 MachineFunction &MF = *MBB.getParent(); in eliminateFrameIndex() local
780 *static_cast<const ARMBaseInstrInfo *>(MF.getSubtarget().getInstrInfo()); in eliminateFrameIndex()
781 const ARMFrameLowering *TFI = getFrameLowering(MF); in eliminateFrameIndex()
782 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>(); in eliminateFrameIndex()
788 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj); in eliminateFrameIndex()
796 assert(TFI->hasReservedCallFrame(MF) && in eliminateFrameIndex()
799 assert(!MF.getFrameInfo().hasVarSizedObjects() && in eliminateFrameIndex()
846 ScratchReg = MF.getRegInfo().createVirtualRegister(RegClass); in eliminateFrameIndex()
868 auto MF = MBB->getParent(); in shouldCoalesce() local
869 const MachineRegisterInfo &MRI = MF->getRegInfo(); in shouldCoalesce()
896 auto AFI = MF->getInfo<ARMFunctionInfo>(); in shouldCoalesce()