Lines Matching refs:CondCodes
214 ARMCC::CondCodes Pred = (ARMCC::CondCodes)MI.getOperand(NumOps - 1).getImm(); in convertToThreeAddress()
527 ARMCC::CondCodes CC = (ARMCC::CondCodes)(int)Cond[0].getImm(); in reverseBranchCondition()
569 CC += ARMCondCodeToString((ARMCC::CondCodes)Op.getImm()); in createMIROperandComment()
611 ARMCC::CondCodes CC1 = (ARMCC::CondCodes)Pred1[0].getImm(); in SubsumesPredicate()
612 ARMCC::CondCodes CC2 = (ARMCC::CondCodes)Pred2[0].getImm(); in SubsumesPredicate()
2210 ARMCC::CondCodes llvm::getInstrPredicate(const MachineInstr &MI, in getInstrPredicate()
2219 return (ARMCC::CondCodes)MI.getOperand(PIdx).getImm(); in getInstrPredicate()
2242 ARMCC::CondCodes CC = getInstrPredicate(MI, PredReg); in commuteInstructionImpl()
2352 NewMI.addImm(ARMCC::getOppositeCondition(ARMCC::CondCodes(CondCode))); in optimizeSelect()
2446 ARMCC::CondCodes Pred, Register PredReg, in emitARMRegPlusImmediate()
2817 inline static ARMCC::CondCodes getCmpToAddCondition(ARMCC::CondCodes CC) { in getCmpToAddCondition()
3115 SmallVector<std::pair<MachineOperand*, ARMCC::CondCodes>, 4> in optimizeCompareInstr()
3136 ARMCC::CondCodes CC; in optimizeCompareInstr()
3141 CC = (ARMCC::CondCodes)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
3186 ARMCC::CondCodes NewCC = (IsSub ? getSwappedCondition(CC) : getCmpToAddCondition(CC)); in optimizeCompareInstr()
5490 ARMCC::CondCodes Pred = getInstrPredicate(*CmpMI, PredReg); in findCMPToFoldIntoCBZ()