203   unsigned AddrMode = (TSFlags & ARMII::AddrModeMask);  in convertToThreeAddress()  local
215   switch (AddrMode) {  in convertToThreeAddress()
2610   unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);  in rewriteARMFrameIndex()  local
2615     AddrMode = ARMII::AddrMode2;  in rewriteARMFrameIndex()
2658     switch (AddrMode) {  in rewriteARMFrameIndex()
2704       Scale = (AddrMode == ARMII::AddrModeT2_i7s2 ? 2 :  in rewriteARMFrameIndex()
2705                AddrMode == ARMII::AddrModeT2_i7s4 ? 4 : 1);  in rewriteARMFrameIndex()
2731           if (AddrMode == ARMII::AddrMode_i12)  in rewriteARMFrameIndex()
2744         if (AddrMode == ARMII::AddrMode_i12)  in rewriteARMFrameIndex()
5913   unsigned AddrMode = (MI->getDesc().TSFlags & ARMII::AddrModeMask);  in checkAndUpdateStackOffset()  local
5917   else if (SPIdx != 1 && (AddrMode != ARMII::AddrModeT2_i8s4 || SPIdx != 2))  in checkAndUpdateStackOffset()
5923   if (AddrMode == ARMII::AddrMode1        // Arithmetic instructions  in checkAndUpdateStackOffset()
5924       || AddrMode == ARMII::AddrMode4     // Load/Store Multiple  in checkAndUpdateStackOffset()
5925       || AddrMode == ARMII::AddrMode6     // Neon Load/Store Multiple  in checkAndUpdateStackOffset()
5926       || AddrMode == ARMII::AddrModeT2_so // SP can't be used as based register  in checkAndUpdateStackOffset()
5927       || AddrMode == ARMII::AddrModeT2_pc // PCrel access  in checkAndUpdateStackOffset()
5928       || AddrMode == ARMII::AddrMode2     // Used by PRE and POST indexed LD/ST  in checkAndUpdateStackOffset()
5929       || AddrMode == ARMII::AddrModeT2_i7 // v8.1-M MVE  in checkAndUpdateStackOffset()
5930       || AddrMode == ARMII::AddrModeT2_i7s2 // v8.1-M MVE  in checkAndUpdateStackOffset()
5931       || AddrMode == ARMII::AddrModeT2_i7s4 // v8.1-M sys regs VLDR/VSTR  in checkAndUpdateStackOffset()
5932       || AddrMode == ARMII::AddrModeNone)  in checkAndUpdateStackOffset()
5949   switch (AddrMode) {  in checkAndUpdateStackOffset()