62 static bool foldImmediates(MachineInstr &MI, const SIInstrInfo *TII,  in foldImmediates()  argument
64   assert(TII->isVOP1(MI) || TII->isVOP2(MI) || TII->isVOPC(MI));  in foldImmediates()
78         if (TII->isOperandLegal(MI, Src0Idx, &MovSrc)) {  in foldImmediates()
105     if (TII->commuteInstruction(MI)) {  in foldImmediates()
106       if (foldImmediates(MI, TII, MRI, false))  in foldImmediates()
110       TII->commuteInstruction(MI);  in foldImmediates()
117 static bool isKImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) {  in isKImmOperand()  argument
119     !TII->isInlineConstant(*Src.getParent(),  in isKImmOperand()
123 static bool isKUImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) {  in isKUImmOperand()  argument
125     !TII->isInlineConstant(*Src.getParent(),  in isKUImmOperand()
129 static bool isKImmOrKUImmOperand(const SIInstrInfo *TII,  in isKImmOrKUImmOperand()  argument
134     return !TII->isInlineConstant(Src);  in isKImmOrKUImmOperand()
139     return !TII->isInlineConstant(Src);  in isKImmOrKUImmOperand()
147 static bool isReverseInlineImm(const SIInstrInfo *TII,  in isReverseInlineImm()  argument
150   if (!isInt<32>(Src.getImm()) || TII->isInlineConstant(Src))  in isReverseInlineImm()
171 static void shrinkScalarCompare(const SIInstrInfo *TII, MachineInstr &MI) {  in shrinkScalarCompare()  argument
175     TII->commuteInstruction(MI, false, 0, 1);  in shrinkScalarCompare()
194     if (isKImmOrKUImmOperand(TII, Src1, HasUImm)) {  in shrinkScalarCompare()
200       MI.setDesc(TII->get(SOPKOpc));  in shrinkScalarCompare()
206   const MCInstrDesc &NewDesc = TII->get(SOPKOpc);  in shrinkScalarCompare()
208   if ((TII->sopkIsZext(SOPKOpc) && isKUImmOperand(TII, Src1)) ||  in shrinkScalarCompare()
209       (!TII->sopkIsZext(SOPKOpc) && isKImmOperand(TII, Src1))) {  in shrinkScalarCompare()
222   const SIInstrInfo *TII = ST.getInstrInfo();  in shrinkMIMG()  local
223   const SIRegisterInfo &TRI = TII->getRegisterInfo();  in shrinkMIMG()
294   MI.setDesc(TII->get(NewOpcode));  in shrinkMIMG()
316                                 const SIInstrInfo *TII,  in shrinkScalarLogicOp()  argument
359     if (!TII->commuteInstruction(MI, false, 1, 2))  in shrinkScalarLogicOp()
373       MI.setDesc(TII->get(Opc));  in shrinkScalarLogicOp()
439                                           const SIInstrInfo *TII) {  in dropInstructionKeepingImpDefs()  argument
448             TII->get(AMDGPU::IMPLICIT_DEF), Op.getReg());  in dropInstructionKeepingImpDefs()
474                                const SIInstrInfo *TII) {  in matchSwap()  argument
487   unsigned Size = TII->getOpSize(MovT, 0) / 4;  in matchSwap()
489   const SIRegisterInfo &TRI = TII->getRegisterInfo();  in matchSwap()
566                          TII->get(AMDGPU::V_SWAP_B32))  in matchSwap()
578     dropInstructionKeepingImpDefs(*MovY, TII);  in matchSwap()
582       dropInstructionKeepingImpDefs(MovT, TII);  in matchSwap()
605   const SIInstrInfo *TII = ST.getInstrInfo();  in runOnMachineFunction()  local
631           if (isReverseInlineImm(TII, Src, ReverseImm)) {  in runOnMachineFunction()
632             MI.setDesc(TII->get(AMDGPU::V_BFREV_B32_e32));  in runOnMachineFunction()
641         if (auto *NextMI = matchSwap(MI, MRI, TII)) {  in runOnMachineFunction()
659           if (TII->commuteInstruction(MI, false, 1, 2))  in runOnMachineFunction()
673           if (Src1->isImm() && isKImmOperand(TII, *Src1)) {  in runOnMachineFunction()
677             MI.setDesc(TII->get(Opc));  in runOnMachineFunction()
684       if (MI.isCompare() && TII->isSOPC(MI)) {  in runOnMachineFunction()
685         shrinkScalarCompare(TII, MI);  in runOnMachineFunction()
696           if (isKImmOperand(TII, Src))  in runOnMachineFunction()
697             MI.setDesc(TII->get(AMDGPU::S_MOVK_I32));  in runOnMachineFunction()
698           else if (isReverseInlineImm(TII, Src, ReverseImm)) {  in runOnMachineFunction()
699             MI.setDesc(TII->get(AMDGPU::S_BREV_B32));  in runOnMachineFunction()
711         if (shrinkScalarLogicOp(ST, MRI, TII, MI))  in runOnMachineFunction()
715       if (TII->isMIMG(MI.getOpcode()) &&  in runOnMachineFunction()
723       if (!TII->hasVALU32BitEncoding(MI.getOpcode()))  in runOnMachineFunction()
726       if (!TII->canShrink(MI, MRI)) {  in runOnMachineFunction()
729         if (!MI.isCommutable() || !TII->commuteInstruction(MI) ||  in runOnMachineFunction()
730             !TII->canShrink(MI, MRI))  in runOnMachineFunction()
736       if (!TII->hasVALU32BitEncoding(MI.getOpcode()))  in runOnMachineFunction()
741       if (TII->isVOPC(Op32)) {  in runOnMachineFunction()
763             TII->getNamedOperand(MI, AMDGPU::OpName::src2);  in runOnMachineFunction()
776       const MachineOperand *SDst = TII->getNamedOperand(MI,  in runOnMachineFunction()
780       const MachineOperand *Src2 = TII->getNamedOperand(MI,  in runOnMachineFunction()
807       MachineInstr *Inst32 = TII->buildShrunkInst(MI, Op32);  in runOnMachineFunction()
814       foldImmediates(*Inst32, TII, MRI);  in runOnMachineFunction()