127                            return Opc == AMDGPU::S_CBRANCH_VCCZ ||  in optimizeVcndVcmpPair()
128                                   Opc == AMDGPU::S_CBRANCH_VCCNZ; });  in optimizeVcndVcmpPair()
133       TRI->findReachingDef(CondReg, AMDGPU::NoSubRegister, *I, *MRI, LIS);  in optimizeVcndVcmpPair()
150   if (!Cmp || !(Cmp->getOpcode() == AMDGPU::V_CMP_NE_U32_e32 ||  in optimizeVcndVcmpPair()
151                 Cmp->getOpcode() == AMDGPU::V_CMP_NE_U32_e64) ||  in optimizeVcndVcmpPair()
155   MachineOperand *Op1 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src0);  in optimizeVcndVcmpPair()
156   MachineOperand *Op2 = TII->getNamedOperand(*Cmp, AMDGPU::OpName::src1);  in optimizeVcndVcmpPair()
164   if (!Sel || Sel->getOpcode() != AMDGPU::V_CNDMASK_B32_e64)  in optimizeVcndVcmpPair()
167   if (TII->hasModifiersSet(*Sel, AMDGPU::OpName::src0_modifiers) ||  in optimizeVcndVcmpPair()
168       TII->hasModifiersSet(*Sel, AMDGPU::OpName::src1_modifiers))  in optimizeVcndVcmpPair()
171   Op1 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src0);  in optimizeVcndVcmpPair()
172   Op2 = TII->getNamedOperand(*Sel, AMDGPU::OpName::src1);  in optimizeVcndVcmpPair()
173   MachineOperand *CC = TII->getNamedOperand(*Sel, AMDGPU::OpName::src2);  in optimizeVcndVcmpPair()
195   assert(AndSCC.getReg() == AMDGPU::SCC);  in optimizeVcndVcmpPair()
197   assert(Andn2SCC.getReg() == AMDGPU::SCC);  in optimizeVcndVcmpPair()
315   AndOpc = Wave32 ? AMDGPU::S_AND_B32 : AMDGPU::S_AND_B64;  in runOnMachineFunction()
316   Andn2Opc = Wave32 ? AMDGPU::S_ANDN2_B32 : AMDGPU::S_ANDN2_B64;  in runOnMachineFunction()
318       Wave32 ? AMDGPU::S_OR_SAVEEXEC_B32 : AMDGPU::S_OR_SAVEEXEC_B64;  in runOnMachineFunction()
319   XorTermrOpc = Wave32 ? AMDGPU::S_XOR_B32_term : AMDGPU::S_XOR_B64_term;  in runOnMachineFunction()
320   CondReg = MCRegister::from(Wave32 ? AMDGPU::VCC_LO : AMDGPU::VCC);  in runOnMachineFunction()
321   ExecReg = MCRegister::from(Wave32 ? AMDGPU::EXEC_LO : AMDGPU::EXEC);  in runOnMachineFunction()
323   DenseSet<Register> RecalcRegs({AMDGPU::EXEC_LO, AMDGPU::EXEC_HI});  in runOnMachineFunction()
329       RecalcRegs.insert(AMDGPU::SCC);  in runOnMachineFunction()
335       RecalcRegs.insert(AMDGPU::VCC_LO);  in runOnMachineFunction()
336       RecalcRegs.insert(AMDGPU::VCC_HI);  in runOnMachineFunction()
337       RecalcRegs.insert(AMDGPU::SCC);  in runOnMachineFunction()
351       if (Term.getOpcode() != AMDGPU::S_ENDPGM || Term.getNumOperands() != 1)  in runOnMachineFunction()
360           if (I->isUnconditionalBranch() || I->getOpcode() == AMDGPU::S_ENDPGM)  in runOnMachineFunction()