Lines Matching refs:AMDGPU
160 assert(ImpDefSCC.getReg() == AMDGPU::SCC && ImpDefSCC.isDef()); in setImpSCCDefDead()
192 U->getOpcode() != AMDGPU::SI_END_CF) in isSimpleIf()
204 assert(Cond.getSubReg() == AMDGPU::NoSubRegister); in emitIf()
207 assert(ImpDefSCC.getReg() == AMDGPU::SCC && ImpDefSCC.isDef()); in emitIf()
226 BuildMI(MBB, I, DL, TII->get(AMDGPU::COPY), CopyReg) in emitIf()
261 MachineInstr *NewBr = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ)) in emitIf()
280 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in emitIf()
331 BuildMI(MBB, ElsePt, DL, TII->get(AMDGPU::S_CBRANCH_EXECZ)) in emitElse()
352 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in emitElse()
410 BuildMI(MBB, BranchPt, DL, TII->get(AMDGPU::S_CBRANCH_EXECNZ)) in emitLoop()
514 if (I->modifiesRegister(AMDGPU::EXEC, TRI) && in findMaskOperands()
565 = TII->getNamedOperand(*Next, AMDGPU::OpName::src1)->getReg(); in optimizeEndCf()
587 case AMDGPU::SI_IF: in process()
591 case AMDGPU::SI_ELSE: in process()
595 case AMDGPU::SI_IF_BREAK: in process()
599 case AMDGPU::SI_LOOP: in process()
603 case AMDGPU::SI_WATERFALL_LOOP: in process()
604 MI.setDesc(TII->get(AMDGPU::S_CBRANCH_EXECNZ)); in process()
607 case AMDGPU::SI_END_CF: in process()
621 case AMDGPU::S_AND_B64: in process()
622 case AMDGPU::S_OR_B64: in process()
623 case AMDGPU::S_AND_B32: in process()
624 case AMDGPU::S_OR_B32: in process()
643 if (MI.getOpcode() == AMDGPU::SI_INIT_EXEC) { in lowerInitExec()
646 TII->get(IsWave32 ? AMDGPU::S_MOV_B32 : AMDGPU::S_MOV_B64), Exec) in lowerInitExec()
685 Register CountReg = MRI->createVirtualRegister(&AMDGPU::SGPR_32RegClass); in lowerInitExec()
686 auto BfeMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_BFE_U32), CountReg) in lowerInitExec()
691 TII->get(IsWave32 ? AMDGPU::S_BFM_B32 : AMDGPU::S_BFM_B64), Exec) in lowerInitExec()
694 auto CmpMI = BuildMI(*MBB, FirstMI, DL, TII->get(AMDGPU::S_CMP_EQ_U32)) in lowerInitExec()
699 TII->get(IsWave32 ? AMDGPU::S_CMOV_B32 : AMDGPU::S_CMOV_B64), in lowerInitExec()
769 FallThrough->findBranchDebugLoc(), TII->get(AMDGPU::S_BRANCH)) in removeMBBifRedundant()
787 AndOpc = AMDGPU::S_AND_B32; in runOnMachineFunction()
788 OrOpc = AMDGPU::S_OR_B32; in runOnMachineFunction()
789 XorOpc = AMDGPU::S_XOR_B32; in runOnMachineFunction()
790 MovTermOpc = AMDGPU::S_MOV_B32_term; in runOnMachineFunction()
791 Andn2TermOpc = AMDGPU::S_ANDN2_B32_term; in runOnMachineFunction()
792 XorTermrOpc = AMDGPU::S_XOR_B32_term; in runOnMachineFunction()
793 OrTermrOpc = AMDGPU::S_OR_B32_term; in runOnMachineFunction()
794 OrSaveExecOpc = AMDGPU::S_OR_SAVEEXEC_B32; in runOnMachineFunction()
795 Exec = AMDGPU::EXEC_LO; in runOnMachineFunction()
797 AndOpc = AMDGPU::S_AND_B64; in runOnMachineFunction()
798 OrOpc = AMDGPU::S_OR_B64; in runOnMachineFunction()
799 XorOpc = AMDGPU::S_XOR_B64; in runOnMachineFunction()
800 MovTermOpc = AMDGPU::S_MOV_B64_term; in runOnMachineFunction()
801 Andn2TermOpc = AMDGPU::S_ANDN2_B64_term; in runOnMachineFunction()
802 XorTermrOpc = AMDGPU::S_XOR_B64_term; in runOnMachineFunction()
803 OrTermrOpc = AMDGPU::S_OR_B64_term; in runOnMachineFunction()
804 OrSaveExecOpc = AMDGPU::S_OR_SAVEEXEC_B64; in runOnMachineFunction()
805 Exec = AMDGPU::EXEC; in runOnMachineFunction()
822 if (MI.getOpcode() == AMDGPU::SI_DEMOTE_I1) { in runOnMachineFunction()
844 case AMDGPU::SI_IF: in runOnMachineFunction()
845 case AMDGPU::SI_ELSE: in runOnMachineFunction()
846 case AMDGPU::SI_IF_BREAK: in runOnMachineFunction()
847 case AMDGPU::SI_WATERFALL_LOOP: in runOnMachineFunction()
848 case AMDGPU::SI_LOOP: in runOnMachineFunction()
849 case AMDGPU::SI_END_CF: in runOnMachineFunction()
854 case AMDGPU::SI_INIT_EXEC: in runOnMachineFunction()
855 case AMDGPU::SI_INIT_EXEC_FROM_INPUT: in runOnMachineFunction()
858 LIS->removeAllRegUnitsForPhysReg(AMDGPU::EXEC); in runOnMachineFunction()