1061     Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1074       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1088       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1104       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1118       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1130       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1131       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1148       Register SReg = MRI.createVirtualRegister(BoolXExecRC);  in insertVectorSelect()
1149       Register SReg2 = MRI.createVirtualRegister(RI.getBoolRC());  in insertVectorSelect()
1179   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertEQ()
1192   Register Reg = MRI.createVirtualRegister(RI.getBoolRC());  in insertNE()
2020       auto Tmp = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in expandMovDPP64()
2226   Register PCReg = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in insertIndirectBranch()
2668     Register DstElt = MRI.createVirtualRegister(EltRC);  in insertSelect()
4592   Register Reg = MRI.createVirtualRegister(VRC);  in legalizeOpWithMove()
4607   Register SubReg = MRI.createVirtualRegister(SubRC);  in buildExtractSubReg()
4619   Register NewSuperReg = MRI.createVirtualRegister(SuperRC);  in buildExtractSubReg()
4817       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
4823       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
4849     Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP2()
4921       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
4927       Register Reg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in legalizeOperandsVOP3()
4995   Register DstReg = MRI.createVirtualRegister(SRC);  in readlaneVGPRToSGPR()
5000     Register NewSrcReg = MRI.createVirtualRegister(VRC);  in readlaneVGPRToSGPR()
5016     Register SGPR = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in readlaneVGPRToSGPR()
5167   Register DstReg = MRI.createVirtualRegister(DstRC);  in legalizeGenericOperand()
5227     Register CurRegLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadSRsrcFromVGPRLoop()
5228     Register CurRegHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in emitLoadSRsrcFromVGPRLoop()
5242     Register CurReg = MRI.createVirtualRegister(&AMDGPU::SGPR_64RegClass);  in emitLoadSRsrcFromVGPRLoop()
5249     Register NewCondReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadSRsrcFromVGPRLoop()
5262       Register AndReg = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadSRsrcFromVGPRLoop()
5271   Register SRsrc = MRI.createVirtualRegister(SRsrcRC);  in emitLoadSRsrcFromVGPRLoop()
5285   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in emitLoadSRsrcFromVGPRLoop()
5327   Register SaveExec = MRI.createVirtualRegister(BoolXExecRC);  in loadSRsrcFromVGPR()
5400   Register Zero64 = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in extractRsrcPtr()
5401   Register SRsrcFormatLo = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
5402   Register SRsrcFormatHi = MRI.createVirtualRegister(&AMDGPU::SGPR_32RegClass);  in extractRsrcPtr()
5403   Register NewSRsrc = MRI.createVirtualRegister(&AMDGPU::SGPR_128RegClass);  in extractRsrcPtr()
5645       Register NewVAddrLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
5646       Register NewVAddrHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in legalizeOperands()
5647       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
5650       Register CondReg0 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
5651       Register CondReg1 = MRI.createVirtualRegister(BoolXExecRC);  in legalizeOperands()
5690       Register NewVAddr = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in legalizeOperands()
5963         Register NewCarryReg = MRI.createVirtualRegister(CarryRC);  in moveToVALU()
5970       Register DestReg = MRI.createVirtualRegister(RI.getEquivalentVGPRClass(  in moveToVALU()
6000       Register DestReg = MRI.createVirtualRegister(NewRC);  in moveToVALU()
6118       NewDstReg = MRI.createVirtualRegister(NewDstRC);  in moveToVALU()
6146     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in moveScalarAddSub()
6212   Register CopySCC = MRI.createVirtualRegister(TC);  in lowerSelect()
6227   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerSelect()
6251   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
6252   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarAbs()
6281     Register NewDest = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in lowerScalarXnor()
6301     Register Temp = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
6302     Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in lowerScalarXnor()
6346   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
6347   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass);  in splitScalarNotBinop()
6375   Register NewDest = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
6376   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);  in splitScalarBinOpN2()
6418   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
6424   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitUnaryOp()
6430   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitUnaryOp()
6458   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitAddSub()
6459   Register DestSub0 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitAddSub()
6460   Register DestSub1 = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitAddSub()
6462   Register CarryReg = MRI.createVirtualRegister(CarryRC);  in splitScalar64BitAddSub()
6463   Register DeadCarryReg = MRI.createVirtualRegister(CarryRC);  in splitScalar64BitAddSub()
6559   Register DestSub0 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
6564   Register DestSub1 = MRI.createVirtualRegister(NewDestSubRC);  in splitScalar64BitBinaryOp()
6569   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitBinaryOp()
6600   Register Interm = MRI.createVirtualRegister(&AMDGPU::SReg_64RegClass);  in splitScalar64BitXnor()
6616   Register NewDest = MRI.createVirtualRegister(DestRC);  in splitScalar64BitXnor()
6643   Register MidReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
6644   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBCNT()
6683     Register MidRegLo = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
6684     Register MidRegHi = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
6685     Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
6708   Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in splitScalar64BitBFE()
6709   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitBFE()
6765   Register ResultReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
6773     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
6774     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
6792     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
6802     Register ImmReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
6803     Register TmpReg = MRI.createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in movePackToVALU()
7255     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformIfRegion()
7282     Register DstReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
7283     Register BackEdgeReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
7293         Register ZeroReg = MRI.createVirtualRegister(RI.getBoolRC());  in convertNonUniformLoopRegion()
7377   Register UnusedCarry = MRI.createVirtualRegister(RI.getBoolRC());  in getAddNoCarry()