Lines Matching refs:Load0
133 bool SIInstrInfo::areLoadsFromSameBasePtr(SDNode *Load0, SDNode *Load1, in areLoadsFromSameBasePtr() argument
136 if (!Load0->isMachineOpcode() || !Load1->isMachineOpcode()) in areLoadsFromSameBasePtr()
139 unsigned Opc0 = Load0->getMachineOpcode(); in areLoadsFromSameBasePtr()
149 if (getNumOperandsNoGlue(Load0) != getNumOperandsNoGlue(Load1)) in areLoadsFromSameBasePtr()
153 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
170 Offset0 = cast<ConstantSDNode>(Load0->getOperand(Offset0Idx))->getZExtValue(); in areLoadsFromSameBasePtr()
181 assert(getNumOperandsNoGlue(Load0) == getNumOperandsNoGlue(Load1)); in areLoadsFromSameBasePtr()
184 if (Load0->getOperand(0) != Load1->getOperand(0)) in areLoadsFromSameBasePtr()
188 dyn_cast<ConstantSDNode>(Load0->getOperand(1)); in areLoadsFromSameBasePtr()
204 if (!nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::soffset) || in areLoadsFromSameBasePtr()
205 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::vaddr) || in areLoadsFromSameBasePtr()
206 !nodesHaveSameOperandValue(Load0, Load1, AMDGPU::OpName::srsrc)) in areLoadsFromSameBasePtr()
221 SDValue Off0 = Load0->getOperand(OffIdx0); in areLoadsFromSameBasePtr()
474 bool SIInstrInfo::shouldScheduleLoadsNear(SDNode *Load0, SDNode *Load1, in shouldScheduleLoadsNear() argument