6430   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitUnaryOp()  local
6431   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitUnaryOp()
6437   MRI.replaceRegWith(Dest.getReg(), FullDestReg);  in splitScalar64BitUnaryOp()
6446   addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);  in splitScalar64BitUnaryOp()
6458   Register FullDestReg = MRI.createVirtualRegister(&AMDGPU::VReg_64RegClass);  in splitScalar64BitAddSub()  local
6504   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitAddSub()
6510   MRI.replaceRegWith(Dest.getReg(), FullDestReg);  in splitScalar64BitAddSub()
6518   addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);  in splitScalar64BitAddSub()
6569   Register FullDestReg = MRI.createVirtualRegister(NewDestRC);  in splitScalar64BitBinaryOp()  local
6570   BuildMI(MBB, MII, DL, get(TargetOpcode::REG_SEQUENCE), FullDestReg)  in splitScalar64BitBinaryOp()
6576   MRI.replaceRegWith(Dest.getReg(), FullDestReg);  in splitScalar64BitBinaryOp()
6582   addUsersToMoveToVALUWorklist(FullDestReg, MRI, Worklist);  in splitScalar64BitBinaryOp()