Lines Matching refs:BaseOps
249 const MachineInstr &LdSt, SmallVectorImpl<const MachineOperand *> &BaseOps, in getMemOperandsWithOffsetWidth() argument
270 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
306 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
326 BaseOps.push_back(RSrc); in getMemOperandsWithOffsetWidth()
329 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
337 BaseOps.push_back(SOffset); in getMemOperandsWithOffsetWidth()
351 BaseOps.push_back(&LdSt.getOperand(SRsrcIdx)); in getMemOperandsWithOffsetWidth()
356 BaseOps.push_back(&LdSt.getOperand(I)); in getMemOperandsWithOffsetWidth()
358 BaseOps.push_back(getNamedOperand(LdSt, AMDGPU::OpName::vaddr)); in getMemOperandsWithOffsetWidth()
371 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
384 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()
387 BaseOps.push_back(BaseOp); in getMemOperandsWithOffsetWidth()