Lines Matching refs:VTList
4695 SDVTList VTList = DAG.getVTList(EquivLoadVT, MVT::Other); in adjustLoadValueType() local
4700 VTList, Ops, M->getMemoryVT(), in adjustLoadValueType()
4735 SDVTList VTList = DAG.getVTList(CastVT, MVT::Other); in lowerIntrinsicLoad() local
4736 SDValue MemNode = getMemIntrinsicNode(Opc, DL, VTList, Ops, CastVT, in lowerIntrinsicLoad()
6414 SDVTList VTList = DAG.getVTList({LoadVT, MVT::Glue}); in lowerSBuffer() local
6434 Loads.push_back(getMemIntrinsicNode(AMDGPUISD::BUFFER_LOAD, DL, VTList, Ops, in lowerSBuffer()
7478 SDVTList VTList, in getMemIntrinsicNode() argument
7482 EVT VT = VTList.VTs[0]; in getMemIntrinsicNode()
7494 assert(VTList.NumVTs == 2); in getMemIntrinsicNode()
7495 SDVTList WidenedVTList = DAG.getVTList(WidenedVT, VTList.VTs[1]); in getMemIntrinsicNode()
8351 SDVTList VTList = DAG.getVTList(VT, MVT::Other, MVT::Glue); in getFPBinOp() local
8359 return DAG.getNode(Opcode, SL, VTList, in getFPBinOp()
8373 SDVTList VTList = DAG.getVTList(VT, MVT::Other, MVT::Glue); in getFPTernOp() local
8381 return DAG.getNode(Opcode, SL, VTList, in getFPTernOp()
10386 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1); in performAddCombine() local
10389 return DAG.getNode(Opc, SL, VTList, Args); in performAddCombine()
10427 SDVTList VTList = DAG.getVTList(MVT::i32, MVT::i1); in performSubCombine() local
10430 return DAG.getNode(Opc, SL, VTList, Args); in performSubCombine()