Lines Matching refs:IntrID
1059 unsigned IntrID) const { in getTgtMemIntrinsic()
1061 AMDGPU::lookupRsrcIntrinsic(IntrID)) { in getTgtMemIntrinsic()
1063 (Intrinsic::ID)IntrID); in getTgtMemIntrinsic()
1084 = AMDGPU::getImageDimIntrinsicInfo(IntrID); in getTgtMemIntrinsic()
1130 switch (IntrID) { in getTgtMemIntrinsic()
1235 if (IntrID == Intrinsic::amdgcn_ds_gws_barrier) in getTgtMemIntrinsic()
6872 unsigned IntrID = cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue(); in LowerINTRINSIC_W_CHAIN() local
6875 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
6906 unsigned Instruction = IntrID == Intrinsic::amdgcn_ds_ordered_add ? 0 : 1; in LowerINTRINSIC_W_CHAIN()
6931 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
6947 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
6989 unsigned Opc = (IntrID == Intrinsic::amdgcn_buffer_load) ? in LowerINTRINSIC_W_CHAIN()
7012 const bool IsFormat = IntrID == Intrinsic::amdgcn_raw_buffer_load_format; in LowerINTRINSIC_W_CHAIN()
7032 const bool IsFormat = IntrID == Intrinsic::amdgcn_struct_buffer_load_format; in LowerINTRINSIC_W_CHAIN()
7159 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7440 switch (IntrID) { in LowerINTRINSIC_W_CHAIN()
7468 AMDGPU::getImageDimIntrinsicInfo(IntrID)) in LowerINTRINSIC_W_CHAIN()