Lines Matching refs:INSERT_VECTOR_ELT
281 case ISD::INSERT_VECTOR_ELT: in SITargetLowering()
310 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
311 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v4i32); in SITargetLowering()
324 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
325 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v6i32); in SITargetLowering()
338 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
339 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v8i32); in SITargetLowering()
352 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
353 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v16i32); in SITargetLowering()
366 setOperationAction(ISD::INSERT_VECTOR_ELT, Vec64, Promote); in SITargetLowering()
367 AddPromotedToType(ISD::INSERT_VECTOR_ELT, Vec64, MVT::v32i32); in SITargetLowering()
385 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i16, Custom); in SITargetLowering()
386 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2f16, Custom); in SITargetLowering()
391 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i8, Custom); in SITargetLowering()
392 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i8, Custom); in SITargetLowering()
393 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i8, Custom); in SITargetLowering()
397 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4i16, Custom); in SITargetLowering()
398 setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v4f16, Custom); in SITargetLowering()
619 case ISD::INSERT_VECTOR_ELT: in SITargetLowering()
863 setTargetDAGCombine(ISD::INSERT_VECTOR_ELT); in SITargetLowering()
4573 case ISD::INSERT_VECTOR_ELT: in LowerOperation()
4849 case ISD::INSERT_VECTOR_ELT: { in ReplaceNodeResults()
5453 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, VecVT, Vec, Elt, in lowerINSERT_SUBVECTOR()
5489 SDValue InsHalf = DAG.getNode(ISD::INSERT_VECTOR_ELT, SL, MVT::v2i16, in lowerINSERT_VECTOR_ELT()
9589 case ISD::INSERT_VECTOR_ELT: { in isCanonicalized()
10899 case ISD::INSERT_VECTOR_ELT: in PerformDAGCombine()