Lines Matching refs:getSubReg

172   Register TargetLo = TRI->getSubReg(TargetReg, AMDGPU::sub0);  in buildGitPtr()
173 Register TargetHi = TRI->getSubReg(TargetReg, AMDGPU::sub1); in buildGitPtr()
235 FlatScrInitLo = TRI->getSubReg(FlatScrInit, AMDGPU::sub0); in emitEntryFunctionFlatScratchInit()
236 FlatScrInitHi = TRI->getSubReg(FlatScrInit, AMDGPU::sub1); in emitEntryFunctionFlatScratchInit()
273 FlatScrInitLo = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub0); in emitEntryFunctionFlatScratchInit()
274 FlatScrInitHi = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub1); in emitEntryFunctionFlatScratchInit()
540 Register Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1); in emitEntryFunctionScratchRsrcRegSetup()
541 Register Rsrc03 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup()
581 Register Rsrc2 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2); in emitEntryFunctionScratchRsrcRegSetup()
582 Register Rsrc3 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3); in emitEntryFunctionScratchRsrcRegSetup()
588 Register Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1); in emitEntryFunctionScratchRsrcRegSetup()
616 Register Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0); in emitEntryFunctionScratchRsrcRegSetup()
617 Register Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1); in emitEntryFunctionScratchRsrcRegSetup()
654 Register ScratchRsrcSub0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0); in emitEntryFunctionScratchRsrcRegSetup()
655 Register ScratchRsrcSub1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1); in emitEntryFunctionScratchRsrcRegSetup()