1074   EVT MemVT = Store->getMemoryVT();  in lowerPrivateTruncStore()  local
1107   SDValue MaskedValue = DAG.getZeroExtendInReg(SExtValue, DL, MemVT);  in lowerPrivateTruncStore()
1148   EVT MemVT = StoreNode->getMemoryVT();  in LowerSTORE()  local
1165           MemVT, StoreNode->getAlignment(),  in LowerSTORE()
1174   if (Alignment < MemVT.getStoreSize() &&  in LowerSTORE()
1175       !allowsMisalignedMemoryAccesses(MemVT, AS, Alignment,  in LowerSTORE()
1190       if (MemVT == MVT::i8) {  in LowerSTORE()
1193         assert(MemVT == MVT::i16);  in LowerSTORE()
1221                                      Op->getVTList(), Args, MemVT,  in LowerSTORE()
1240   if (MemVT.bitsLT(MVT::i32))  in LowerSTORE()
1300   EVT MemVT = Load->getMemoryVT();  in lowerPrivateExtLoad()  local
1301   assert(Load->getAlignment() >= MemVT.getStoreSize());  in lowerPrivateExtLoad()
1334   EVT MemEltVT = MemVT.getScalarType();  in lowerPrivateExtLoad()
1354   EVT MemVT = LoadNode->getMemoryVT();  in LowerLOAD()  local
1358       ExtType != ISD::NON_EXTLOAD && MemVT.bitsLT(MVT::i32)) {  in LowerLOAD()
1415     assert(!MemVT.isVector() && (MemVT == MVT::i16 || MemVT == MVT::i8));  in LowerLOAD()
1417         ISD::EXTLOAD, DL, VT, Chain, Ptr, LoadNode->getPointerInfo(), MemVT,  in LowerLOAD()
1420                               DAG.getValueType(MemVT));  in LowerLOAD()
1509     EVT MemVT = VA.getLocVT();  in LowerFormalArguments()  local
1510     if (!VT.isVector() && MemVT.isVector()) {  in LowerFormalArguments()
1512       MemVT = MemVT.getVectorElementType();  in LowerFormalArguments()
1530     if (MemVT.getScalarSizeInBits() != VT.getScalarSizeInBits()) {  in LowerFormalArguments()
1550         MemVT, Alignment, MachineMemOperand::MONonTemporal |  in LowerFormalArguments()
1566 bool R600TargetLowering::canMergeStoresTo(unsigned AS, EVT MemVT,  in canMergeStoresTo()  argument
1570     return (MemVT.getSizeInBits() <= 32);  in canMergeStoresTo()