Lines Matching refs:EXTRACT_VECTOR_ELT
181 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2i32, Custom); in R600TargetLowering()
182 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v2f32, Custom); in R600TargetLowering()
183 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4i32, Custom); in R600TargetLowering()
184 setOperationAction(ISD::EXTRACT_VECTOR_ELT, MVT::v4f32, Custom); in R600TargetLowering()
251 setTargetDAGCombine(ISD::EXTRACT_VECTOR_ELT); in R600TargetLowering()
452 case ISD::EXTRACT_VECTOR_ELT: return LowerEXTRACT_VECTOR_ELT(Op, DAG); in LowerOperation()
545 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
547 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
549 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
551 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
553 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
555 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
557 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), in LowerOperation()
559 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), in LowerOperation()
680 Args.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT, Vector, in vectorToVerticalVector()
698 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, Op.getValueType(), in LowerEXTRACT_VECTOR_ELT()
1396 Result = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, Result, in LowerLOAD()
1604 NewBldVec[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltTy, VectorEntry, in CompactSwizzlableVector()
1649 NewBldVec[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltTy, VectorEntry, in ReorganizeVector()
1654 if (NewBldVec[i].getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in ReorganizeVector()
1663 if (NewBldVec[i].getOpcode() == ISD::EXTRACT_VECTOR_ELT) { in ReorganizeVector()
1739 Result = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::i32, Result, in constBufferLoad()
1850 case ISD::EXTRACT_VECTOR_ELT: { in PerformDAGCombine()