Lines Matching refs:CompareVT
871 EVT CompareVT = LHS.getValueType(); in LowerSELECT_CC() local
887 ISD::CondCode InverseCC = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
888 if (isCondCodeLegal(InverseCC, CompareVT.getSimpleVT())) { in LowerSELECT_CC()
893 if (isCondCodeLegal(SwapInvCC, CompareVT.getSimpleVT())) { in LowerSELECT_CC()
902 (CompareVT == VT || VT == MVT::i32)) { in LowerSELECT_CC()
922 if (isCondCodeLegal(CCSwapped, CompareVT.getSimpleVT())) { in LowerSELECT_CC()
927 ISD::CondCode CCInv = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
929 if (isCondCodeLegal(CCSwapped, CompareVT.getSimpleVT())) { in LowerSELECT_CC()
940 if (CompareVT != VT) { in LowerSELECT_CC()
945 True = DAG.getNode(ISD::BITCAST, DL, CompareVT, True); in LowerSELECT_CC()
946 False = DAG.getNode(ISD::BITCAST, DL, CompareVT, False); in LowerSELECT_CC()
953 CCOpcode = ISD::getSetCCInverse(CCOpcode, CompareVT); in LowerSELECT_CC()
961 SDValue SelectNode = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, in LowerSELECT_CC()
972 if (CompareVT == MVT::f32) { in LowerSELECT_CC()
973 HWTrue = DAG.getConstantFP(1.0f, DL, CompareVT); in LowerSELECT_CC()
974 HWFalse = DAG.getConstantFP(0.0f, DL, CompareVT); in LowerSELECT_CC()
975 } else if (CompareVT == MVT::i32) { in LowerSELECT_CC()
976 HWTrue = DAG.getConstant(-1, DL, CompareVT); in LowerSELECT_CC()
977 HWFalse = DAG.getConstant(0, DL, CompareVT); in LowerSELECT_CC()
985 SDValue Cond = DAG.getNode(ISD::SELECT_CC, DL, CompareVT, LHS, RHS, HWTrue, HWFalse, CC); in LowerSELECT_CC()