Lines Matching refs:AMDGPU

135       STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm])  in getLit16Encoding()
171 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit32Encoding()
207 STI.getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]) in getLit64Encoding()
234 case AMDGPU::OPERAND_REG_IMM_INT32: in getLitEncoding()
235 case AMDGPU::OPERAND_REG_IMM_FP32: in getLitEncoding()
236 case AMDGPU::OPERAND_REG_INLINE_C_INT32: in getLitEncoding()
237 case AMDGPU::OPERAND_REG_INLINE_C_FP32: in getLitEncoding()
238 case AMDGPU::OPERAND_REG_INLINE_AC_INT32: in getLitEncoding()
239 case AMDGPU::OPERAND_REG_INLINE_AC_FP32: in getLitEncoding()
240 case AMDGPU::OPERAND_REG_IMM_V2INT32: in getLitEncoding()
241 case AMDGPU::OPERAND_REG_IMM_V2FP32: in getLitEncoding()
242 case AMDGPU::OPERAND_REG_INLINE_C_V2INT32: in getLitEncoding()
243 case AMDGPU::OPERAND_REG_INLINE_C_V2FP32: in getLitEncoding()
246 case AMDGPU::OPERAND_REG_IMM_INT64: in getLitEncoding()
247 case AMDGPU::OPERAND_REG_IMM_FP64: in getLitEncoding()
248 case AMDGPU::OPERAND_REG_INLINE_C_INT64: in getLitEncoding()
249 case AMDGPU::OPERAND_REG_INLINE_C_FP64: in getLitEncoding()
250 case AMDGPU::OPERAND_REG_INLINE_AC_FP64: in getLitEncoding()
253 case AMDGPU::OPERAND_REG_IMM_INT16: in getLitEncoding()
254 case AMDGPU::OPERAND_REG_INLINE_C_INT16: in getLitEncoding()
255 case AMDGPU::OPERAND_REG_INLINE_AC_INT16: in getLitEncoding()
257 case AMDGPU::OPERAND_REG_IMM_FP16: in getLitEncoding()
258 case AMDGPU::OPERAND_REG_INLINE_C_FP16: in getLitEncoding()
259 case AMDGPU::OPERAND_REG_INLINE_AC_FP16: in getLitEncoding()
263 case AMDGPU::OPERAND_REG_IMM_V2INT16: in getLitEncoding()
264 case AMDGPU::OPERAND_REG_IMM_V2FP16: { in getLitEncoding()
265 if (!isUInt<16>(Imm) && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) in getLitEncoding()
267 if (OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_V2FP16) in getLitEncoding()
271 case AMDGPU::OPERAND_REG_INLINE_C_V2INT16: in getLitEncoding()
272 case AMDGPU::OPERAND_REG_INLINE_AC_V2INT16: in getLitEncoding()
274 case AMDGPU::OPERAND_REG_INLINE_C_V2FP16: in getLitEncoding()
275 case AMDGPU::OPERAND_REG_INLINE_AC_V2FP16: { in getLitEncoding()
286 using namespace AMDGPU::VOP3PEncoding; in getImplicitOpSelHiEncoding()
287 using namespace AMDGPU::OpName; in getImplicitOpSelHiEncoding()
289 if (AMDGPU::getNamedOperandIdx(Opcode, op_sel_hi) != -1) { in getImplicitOpSelHiEncoding()
290 if (AMDGPU::getNamedOperandIdx(Opcode, src2) != -1) in getImplicitOpSelHiEncoding()
292 if (AMDGPU::getNamedOperandIdx(Opcode, src1) != -1) in getImplicitOpSelHiEncoding()
294 if (AMDGPU::getNamedOperandIdx(Opcode, src0) != -1) in getImplicitOpSelHiEncoding()
314 Opcode == AMDGPU::V_ACCVGPR_READ_B32_vi || in encodeInstruction()
315 Opcode == AMDGPU::V_ACCVGPR_WRITE_B32_vi) { in encodeInstruction()
324 if (AMDGPU::isGFX10Plus(STI) && Desc.TSFlags & SIInstrFlags::MIMG) { in encodeInstruction()
325 int vaddr0 = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction()
326 AMDGPU::OpName::vaddr0); in encodeInstruction()
327 int srsrc = AMDGPU::getNamedOperandIdx(MI.getOpcode(), in encodeInstruction()
328 AMDGPU::OpName::srsrc); in encodeInstruction()
340 if ((bytes > 8 && STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal]) || in encodeInstruction()
341 (bytes > 4 && !STI.getFeatureBits()[AMDGPU::FeatureVOP3Literal])) in encodeInstruction()
348 if (!AMDGPU::isSISrcOperand(Desc, i)) in encodeInstruction()
384 MCFixupKind Kind = (MCFixupKind)AMDGPU::fixup_si_sopp_br; in getSOPPBrEncoding()
397 assert(!AMDGPU::isVI(STI) || isUInt<20>(Offset)); in getSMEMOffsetEncoding()
405 using namespace AMDGPU::SDWA; in getSDWASrcEncoding()
415 if (AMDGPU::isSGPR(AMDGPU::mc2PseudoReg(Reg), &MRI)) { in getSDWASrcEncoding()
435 using namespace AMDGPU::SDWA; in getSDWAVopcDstEncoding()
442 if (Reg != AMDGPU::VCC && Reg != AMDGPU::VCC_LO) { in getSDWAVopcDstEncoding()
460 if (MRI.getRegClass(AMDGPU::AGPR_32RegClassID).contains(Reg) || in getAVOperandEncoding()
461 MRI.getRegClass(AMDGPU::AReg_64RegClassID).contains(Reg) || in getAVOperandEncoding()
462 MRI.getRegClass(AMDGPU::AReg_96RegClassID).contains(Reg) || in getAVOperandEncoding()
463 MRI.getRegClass(AMDGPU::AReg_128RegClassID).contains(Reg) || in getAVOperandEncoding()
464 MRI.getRegClass(AMDGPU::AReg_160RegClassID).contains(Reg) || in getAVOperandEncoding()
465 MRI.getRegClass(AMDGPU::AReg_192RegClassID).contains(Reg) || in getAVOperandEncoding()
466 MRI.getRegClass(AMDGPU::AReg_224RegClassID).contains(Reg) || in getAVOperandEncoding()
467 MRI.getRegClass(AMDGPU::AReg_256RegClassID).contains(Reg) || in getAVOperandEncoding()
468 MRI.getRegClass(AMDGPU::AGPR_LO16RegClassID).contains(Reg)) in getAVOperandEncoding()
537 if (AMDGPU::isSISrcOperand(Desc, OpNo)) { in getMachineOpValue()