102   unsigned Opcode = MI.getOpcode();  in isXDL()
115   if (TII.isAlwaysGDS(MI.getOpcode()))  in isSendMsgTraceDataOrGDS()
118   switch (MI.getOpcode()) {  in isSendMsgTraceDataOrGDS()
129     if (TII.isDS(MI.getOpcode())) {  in isSendMsgTraceDataOrGDS()
130       int GDS = AMDGPU::getNamedOperandIdx(MI.getOpcode(),  in isSendMsgTraceDataOrGDS()
140   unsigned Opcode = MI.getOpcode();  in isPermlane()
185   if (isDivFMas(MI->getOpcode()) && checkDivFMasHazards(MI) > 0)  in getHazardType()
188   if (isRWLane(MI->getOpcode()) && checkRWLaneHazards(MI) > 0)  in getHazardType()
196   if (isSGetReg(MI->getOpcode()) && checkGetRegHazards(MI) > 0)  in getHazardType()
199   if (isSSetReg(MI->getOpcode()) && checkSetRegHazards(MI) > 0)  in getHazardType()
202   if (isRFE(MI->getOpcode()) && checkRFEHazards(MI) > 0)  in getHazardType()
206       (TII.isVINTRP(*MI) || isSMovRel(MI->getOpcode())) &&  in getHazardType()
299   if (isDivFMas(MI->getOpcode()))  in PreEmitNoopsCommon()
302   if (isRWLane(MI->getOpcode()))  in PreEmitNoopsCommon()
313   if (isSGetReg(MI->getOpcode()))  in PreEmitNoopsCommon()
316   if (isSSetReg(MI->getOpcode()))  in PreEmitNoopsCommon()
319   if (isRFE(MI->getOpcode()))  in PreEmitNoopsCommon()
323                                            isSMovRel(MI->getOpcode())))  in PreEmitNoopsCommon()
483     return isSSetReg(MI.getOpcode()) && IsHazard(MI);  in getWaitStatesSinceSetReg()
718   unsigned Opcode = MI.getOpcode();  in createsVALUHazard()
888     unsigned Opc = MI.getOpcode();  in fixVcmpxPermlaneHazards()
940            (MI.getOpcode() == AMDGPU::S_WAITCNT &&  in fixVMEMtoScalarWriteHazards()
942            (MI.getOpcode() == AMDGPU::S_WAITCNT_DEPCTR &&  in fixVMEMtoScalarWriteHazards()
965   switch (MI->getOpcode()) {  in fixSMEMtoVectorWriteHazards()
998       switch (MI.getOpcode()) {  in fixSMEMtoVectorWriteHazards()
1065     if (MI.getOpcode() == AMDGPU::S_WAITCNT_DEPCTR &&  in fixVcmpxExecWARHazard()
1121     return IsHazardInst(I) || (I.getOpcode() == AMDGPU::S_WAITCNT_VSCNT &&  in fixLdsBranchVmemWARHazard()
1140       return I.getOpcode() == AMDGPU::S_WAITCNT_VSCNT &&  in fixLdsBranchVmemWARHazard()
1179     const AMDGPU::MIMGInfo *Info = AMDGPU::getMIMGInfo(I.getOpcode());  in checkNSAtoVMEMHazard()
1190   if (MI->getOpcode() != AMDGPU::S_DENORM_MODE)  in checkFPAtomicToDenormModeHazard()
1203     switch (MI.getOpcode()) {  in checkFPAtomicToDenormModeHazard()
1230   unsigned Opc = MI->getOpcode();  in checkMAIHazards908()
1264            MI.getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32_e64 &&  in checkMAIHazards908()
1265            MI.getOpcode() != AMDGPU::V_ACCVGPR_READ_B32_e64;  in checkMAIHazards908()
1335       if (MI.getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32_e64)  in checkMAIHazards908()
1397   unsigned Opc = MI->getOpcode();  in checkMAIHazards90A()
1401            MI.getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32_e64 &&  in checkMAIHazards90A()
1402            MI.getOpcode() != AMDGPU::V_ACCVGPR_READ_B32_e64;  in checkMAIHazards90A()
1453       if (!isDGEMM(MI.getOpcode()) && !isXDL(ST, MI))  in checkMAIHazards90A()
1471     unsigned Opc1 = MI1->getOpcode();  in checkMAIHazards90A()
1559     return MI.getOpcode() == AMDGPU::V_ACCVGPR_READ_B32_e64;  in checkMAILdStHazards()
1580       if (MI.getOpcode() != AMDGPU::V_ACCVGPR_READ_B32_e64 &&  in checkMAILdStHazards()
1581           MI.getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32_e64)  in checkMAILdStHazards()
1604            MI.getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32_e64 &&  in checkMAIVALUHazards()
1605            MI.getOpcode() != AMDGPU::V_ACCVGPR_READ_B32_e64;  in checkMAIVALUHazards()
1609     return isDGEMM(MI.getOpcode());  in checkMAIVALUHazards()
1630     if (!isDGEMM(MI.getOpcode()) && !isXDL(ST, MI))  in checkMAIVALUHazards()
1645   int SrcCIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(),  in checkMAIVALUHazards()
1670         if (DOT->getOpcode() == MI->getOpcode()) {  in checkMAIVALUHazards()
1694         assert(isDGEMM(MFMA->getOpcode()));  in checkMAIVALUHazards()
1705           isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
1720   unsigned Opc = MI->getOpcode();  in checkMAIVALUHazards()
1752     if (DOT && DOT->getOpcode() != MI->getOpcode())  in checkMAIVALUHazards()
1766         assert(isDGEMM(MFMA->getOpcode()));  in checkMAIVALUHazards()
1774         NeedWaitStates = isDGEMM(MFMA->getOpcode())  in checkMAIVALUHazards()
1789       if (!IsMFMAFn(MI) || isDGEMM(MI.getOpcode()) ||  in checkMAIVALUHazards()
1836         MI.getOpcode() != AMDGPU::V_ACCVGPR_WRITE_B32_e64 &&  in ShouldPreferAnother()
1837         MI.getOpcode() != AMDGPU::V_ACCVGPR_READ_B32_e64)  in ShouldPreferAnother()