1465 #define PRINT_DIRECTIVE(DIRECTIVE, MASK)                                       \  macro
1529   PRINT_DIRECTIVE(".amdhsa_float_round_mode_32",  in decodeCOMPUTE_PGM_RSRC1()
1531   PRINT_DIRECTIVE(".amdhsa_float_round_mode_16_64",  in decodeCOMPUTE_PGM_RSRC1()
1533   PRINT_DIRECTIVE(".amdhsa_float_denorm_mode_32",  in decodeCOMPUTE_PGM_RSRC1()
1535   PRINT_DIRECTIVE(".amdhsa_float_denorm_mode_16_64",  in decodeCOMPUTE_PGM_RSRC1()
1541   PRINT_DIRECTIVE(".amdhsa_dx10_clamp", COMPUTE_PGM_RSRC1_ENABLE_DX10_CLAMP);  in decodeCOMPUTE_PGM_RSRC1()
1546   PRINT_DIRECTIVE(".amdhsa_ieee_mode", COMPUTE_PGM_RSRC1_ENABLE_IEEE_MODE);  in decodeCOMPUTE_PGM_RSRC1()
1554   PRINT_DIRECTIVE(".amdhsa_fp16_overflow", COMPUTE_PGM_RSRC1_FP16_OVFL);  in decodeCOMPUTE_PGM_RSRC1()
1560     PRINT_DIRECTIVE(".amdhsa_workgroup_processor_mode",  in decodeCOMPUTE_PGM_RSRC1()
1562     PRINT_DIRECTIVE(".amdhsa_memory_ordered", COMPUTE_PGM_RSRC1_MEM_ORDERED);  in decodeCOMPUTE_PGM_RSRC1()
1563     PRINT_DIRECTIVE(".amdhsa_forward_progress", COMPUTE_PGM_RSRC1_FWD_PROGRESS);  in decodeCOMPUTE_PGM_RSRC1()
1574     PRINT_DIRECTIVE(".amdhsa_enable_private_segment",  in decodeCOMPUTE_PGM_RSRC2()
1577     PRINT_DIRECTIVE(".amdhsa_system_sgpr_private_segment_wavefront_offset",  in decodeCOMPUTE_PGM_RSRC2()
1579   PRINT_DIRECTIVE(".amdhsa_system_sgpr_workgroup_id_x",  in decodeCOMPUTE_PGM_RSRC2()
1581   PRINT_DIRECTIVE(".amdhsa_system_sgpr_workgroup_id_y",  in decodeCOMPUTE_PGM_RSRC2()
1583   PRINT_DIRECTIVE(".amdhsa_system_sgpr_workgroup_id_z",  in decodeCOMPUTE_PGM_RSRC2()
1585   PRINT_DIRECTIVE(".amdhsa_system_sgpr_workgroup_info",  in decodeCOMPUTE_PGM_RSRC2()
1587   PRINT_DIRECTIVE(".amdhsa_system_vgpr_workitem_id",  in decodeCOMPUTE_PGM_RSRC2()
1599   PRINT_DIRECTIVE(  in decodeCOMPUTE_PGM_RSRC2()
1602   PRINT_DIRECTIVE(".amdhsa_exception_fp_denorm_src",  in decodeCOMPUTE_PGM_RSRC2()
1604   PRINT_DIRECTIVE(  in decodeCOMPUTE_PGM_RSRC2()
1607   PRINT_DIRECTIVE(".amdhsa_exception_fp_ieee_overflow",  in decodeCOMPUTE_PGM_RSRC2()
1609   PRINT_DIRECTIVE(".amdhsa_exception_fp_ieee_underflow",  in decodeCOMPUTE_PGM_RSRC2()
1611   PRINT_DIRECTIVE(".amdhsa_exception_fp_ieee_inexact",  in decodeCOMPUTE_PGM_RSRC2()
1613   PRINT_DIRECTIVE(".amdhsa_exception_int_div_zero",  in decodeCOMPUTE_PGM_RSRC2()
1622 #undef PRINT_DIRECTIVE
1628 #define PRINT_DIRECTIVE(DIRECTIVE, MASK)                                       \  in decodeKernelDescriptorDirective()  macro
1720       PRINT_DIRECTIVE(".amdhsa_user_sgpr_private_segment_buffer",  in decodeKernelDescriptorDirective()
1722     PRINT_DIRECTIVE(".amdhsa_user_sgpr_dispatch_ptr",  in decodeKernelDescriptorDirective()
1724     PRINT_DIRECTIVE(".amdhsa_user_sgpr_queue_ptr",  in decodeKernelDescriptorDirective()
1726     PRINT_DIRECTIVE(".amdhsa_user_sgpr_kernarg_segment_ptr",  in decodeKernelDescriptorDirective()
1728     PRINT_DIRECTIVE(".amdhsa_user_sgpr_dispatch_id",  in decodeKernelDescriptorDirective()
1731       PRINT_DIRECTIVE(".amdhsa_user_sgpr_flat_scratch_init",  in decodeKernelDescriptorDirective()
1733     PRINT_DIRECTIVE(".amdhsa_user_sgpr_private_segment_size",  in decodeKernelDescriptorDirective()
1744       PRINT_DIRECTIVE(".amdhsa_wavefront_size32",  in decodeKernelDescriptorDirective()
1766 #undef PRINT_DIRECTIVE  in decodeKernelDescriptorDirective()